V8 API Reference, 7.2.502.16 (for Deno 0.2.4)
v8::base::CPU Class Referencefinal

Public Types

enum  {
  PPC_POWER5, PPC_POWER6, PPC_POWER7, PPC_POWER8,
  PPC_POWER9, PPC_G4, PPC_G5, PPC_PA6T
}
 

Public Member Functions

const charvendor () const
 
int stepping () const
 
int model () const
 
int ext_model () const
 
int family () const
 
int ext_family () const
 
int type () const
 
int implementer () const
 
int architecture () const
 
int variant () const
 
int part () const
 
bool has_fpu () const
 
int icache_line_size () const
 
int dcache_line_size () const
 
bool has_cmov () const
 
bool has_sahf () const
 
bool has_mmx () const
 
bool has_sse () const
 
bool has_sse2 () const
 
bool has_sse3 () const
 
bool has_ssse3 () const
 
bool has_sse41 () const
 
bool has_sse42 () const
 
bool has_osxsave () const
 
bool has_avx () const
 
bool has_fma3 () const
 
bool has_bmi1 () const
 
bool has_bmi2 () const
 
bool has_lzcnt () const
 
bool has_popcnt () const
 
bool is_atom () const
 
bool has_non_stop_time_stamp_counter () const
 
bool has_idiva () const
 
bool has_neon () const
 
bool has_thumb2 () const
 
bool has_vfp () const
 
bool has_vfp3 () const
 
bool has_vfp3_d32 () const
 
bool is_fp64_mode () const
 
bool has_msa () const
 

Static Public Attributes

static const int ARM = 0x41
 
static const int NVIDIA = 0x4e
 
static const int QUALCOMM = 0x51
 
static const int NVIDIA_DENVER = 0x0
 
static const int ARM_CORTEX_A5 = 0xc05
 
static const int ARM_CORTEX_A7 = 0xc07
 
static const int ARM_CORTEX_A8 = 0xc08
 
static const int ARM_CORTEX_A9 = 0xc09
 
static const int ARM_CORTEX_A12 = 0xc0c
 
static const int ARM_CORTEX_A15 = 0xc0f
 
static const int NVIDIA_DENVER_V10 = 0x002
 
static const int UNKNOWN_CACHE_LINE_SIZE = 0
 

Detailed Description

Definition at line 32 of file cpu.h.


The documentation for this class was generated from the following files: