37 #ifndef V8_X64_ASSEMBLER_X64_H_ 38 #define V8_X64_ASSEMBLER_X64_H_ 44 #include "src/assembler.h" 45 #include "src/label.h" 46 #include "src/objects/smi.h" 47 #include "src/x64/constants-x64.h" 48 #include "src/x64/sse-instr.h" 55 #define GENERAL_REGISTERS(V) \ 73 #define ALLOCATABLE_GENERAL_REGISTERS(V) \ 88 #define REGISTER_CODE(R) kRegCode_##R, 89 GENERAL_REGISTERS(REGISTER_CODE)
94 class Register :
public RegisterBase<Register, kRegAfterLast> {
96 bool is_byte_register()
const {
return reg_code_ <= 3; }
99 int high_bit()
const {
return reg_code_ >> 3; }
102 int low_bits()
const {
return reg_code_ & 0x7; }
105 friend class RegisterBase<Register, kRegAfterLast>;
106 explicit constexpr Register(
int code) : RegisterBase(code) {}
109 ASSERT_TRIVIALLY_COPYABLE(Register);
110 static_assert(
sizeof(Register) ==
sizeof(
int),
111 "Register can efficiently be passed by value");
113 #define DECLARE_REGISTER(R) \ 114 constexpr Register R = Register::from_code<kRegCode_##R>(); 115 GENERAL_REGISTERS(DECLARE_REGISTER)
116 #undef DECLARE_REGISTER 117 constexpr Register no_reg = Register::no_reg();
119 constexpr
int kNumRegs = 16;
121 constexpr RegList kJSCallerSaved =
122 Register::ListOf<rax, rcx, rdx,
127 constexpr
int kNumJSCallerSaved = 5;
130 constexpr
int kNumSafepointRegisters = 16;
134 constexpr Register arg_reg_1 = rcx;
135 constexpr Register arg_reg_2 = rdx;
136 constexpr Register arg_reg_3 = r8;
137 constexpr Register arg_reg_4 = r9;
140 constexpr Register arg_reg_1 = rdi;
141 constexpr Register arg_reg_2 = rsi;
142 constexpr Register arg_reg_3 = rdx;
143 constexpr Register arg_reg_4 = rcx;
147 #define DOUBLE_REGISTERS(V) \ 165 #define FLOAT_REGISTERS DOUBLE_REGISTERS 166 #define SIMD128_REGISTERS DOUBLE_REGISTERS 168 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ 185 constexpr
bool kPadArguments =
false;
186 constexpr
bool kSimpleFPAliasing =
true;
187 constexpr
bool kSimdMaskRegisters =
false;
189 enum DoubleRegisterCode {
190 #define REGISTER_CODE(R) kDoubleCode_##R, 191 DOUBLE_REGISTERS(REGISTER_CODE)
196 class XMMRegister :
public RegisterBase<XMMRegister, kDoubleAfterLast> {
200 int high_bit()
const {
return reg_code_ >> 3; }
203 int low_bits()
const {
return reg_code_ & 0x7; }
206 friend class RegisterBase<XMMRegister, kDoubleAfterLast>;
207 explicit constexpr XMMRegister(
int code) : RegisterBase(code) {}
210 ASSERT_TRIVIALLY_COPYABLE(XMMRegister);
211 static_assert(
sizeof(XMMRegister) ==
sizeof(
int),
212 "XMMRegister can efficiently be passed by value");
214 typedef XMMRegister FloatRegister;
216 typedef XMMRegister DoubleRegister;
218 typedef XMMRegister Simd128Register;
220 #define DECLARE_REGISTER(R) \ 221 constexpr DoubleRegister R = DoubleRegister::from_code<kDoubleCode_##R>(); 222 DOUBLE_REGISTERS(DECLARE_REGISTER)
223 #undef DECLARE_REGISTER 224 constexpr DoubleRegister no_dreg = DoubleRegister::no_reg();
253 not_carry = above_equal,
255 not_zero = not_equal,
258 last_condition = greater
266 inline Condition NegateCondition(Condition cc) {
267 return static_cast<Condition
>(cc ^ 1);
272 kRoundToNearest = 0x0,
284 explicit constexpr Immediate(int32_t value) : value_(value) {}
285 explicit constexpr Immediate(int32_t value, RelocInfo::Mode rmode)
286 : value_(value), rmode_(rmode) {}
287 explicit Immediate(Smi value)
288 : value_(static_cast<int32_t>(static_cast<intptr_t>(value.ptr()))) {
289 DCHECK(SmiValuesAre31Bits());
293 const int32_t value_;
294 const RelocInfo::Mode rmode_ = RelocInfo::NONE;
296 friend class Assembler;
298 ASSERT_TRIVIALLY_COPYABLE(Immediate);
299 static_assert(
sizeof(Immediate) <= kPointerSize,
300 "Immediate must be small enough to pass it by value");
305 enum ScaleFactor : int8_t {
310 times_int_size = times_4,
311 times_pointer_size = (kPointerSize == 8) ? times_8 : times_4
349 bool AddressUsesRegister(
Register reg)
const;
353 bool requires_rex()
const {
return data_.rex != 0; }
356 int operand_size()
const {
return data_.len; }
358 const Data& data()
const {
return data_; }
363 ASSERT_TRIVIALLY_COPYABLE(Operand);
364 static_assert(
sizeof(Operand) <= 2 * kPointerSize,
365 "Operand must be small enough to pass it by value");
367 #define ASSEMBLER_INSTRUCTION_LIST(V) \ 393 #define SHIFT_INSTRUCTION_LIST(V) \ 425 explicit ConstPool(Assembler* assm) : assm_(assm) {}
427 bool TryRecordEntry(intptr_t data, RelocInfo::Mode mode);
428 bool IsEmpty()
const {
return entries_.empty(); }
437 bool AddSharedEntry(uint64_t data,
int offset);
440 bool IsMoveRipRelative(byte* instr);
445 typedef std::multimap<uint64_t, int> EntryMap;
449 static constexpr
int kRipRelativeDispSize = 4;
452 static constexpr
int kMoveRipRelativeDispOffset =
456 static constexpr
int kMoveImm64Offset = 2;
458 static constexpr
uint32_t kMoveRipRelativeMask = 0x00C7FFFB;
460 static constexpr
uint32_t kMoveRipRelativeInstr = 0x00058B48;
463 class V8_EXPORT_PRIVATE Assembler :
public AssemblerBase {
474 static constexpr
int kGap = 32;
491 Assembler(
const AssemblerOptions& options,
void* buffer,
int buffer_size);
492 ~Assembler()
override =
default;
497 void GetCode(Isolate* isolate, CodeDesc* desc);
507 static inline Address target_address_at(Address pc, Address constant_pool);
508 static inline void set_target_address_at(
509 Address pc, Address constant_pool, Address target,
510 ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED);
514 static inline Address target_address_from_return_address(Address pc);
518 inline static void deserialization_set_special_target_at(
519 Address instruction_payload, Code code, Address target);
522 inline static int deserialization_special_target_size(
523 Address instruction_payload);
526 inline static void deserialization_set_target_internal_reference_at(
527 Address pc, Address target,
528 RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE);
530 inline Handle<Code> code_target_object_handle_at(Address pc);
531 inline Address runtime_entry_at(Address pc);
534 static constexpr
int kSpecialTargetSize = 4;
537 static constexpr
int kCallTargetAddressOffset = 4;
539 static constexpr
int kCallScratchRegisterInstructionLength = 3;
541 static constexpr
int kMoveAddressIntoScratchRegisterInstructionLength =
544 static constexpr
int kCallSequenceLength =
545 kMoveAddressIntoScratchRegisterInstructionLength +
546 kCallScratchRegisterInstructionLength;
549 static constexpr byte kTestEaxByte = 0xA9;
551 static constexpr byte kTestAlByte = 0xA8;
553 static constexpr byte kNopByte = 0x90;
556 static constexpr byte kJccShortPrefix = 0x70;
557 static constexpr byte kJncShortOpcode = kJccShortPrefix | not_carry;
558 static constexpr byte kJcShortOpcode = kJccShortPrefix | carry;
559 static constexpr byte kJnzShortOpcode = kJccShortPrefix | not_zero;
560 static constexpr byte kJzShortOpcode = kJccShortPrefix | zero;
563 enum SIMDPrefix {
kNone = 0x0, k66 = 0x1, kF3 = 0x2, kF2 = 0x3 };
564 enum VectorLength { kL128 = 0x0, kL256 = 0x4, kLIG = kL128, kLZ = kL128 };
565 enum VexW { kW0 = 0x0, kW1 = 0x80, kWIG = kW0 };
566 enum LeadingOpcode { k0F = 0x1, k0F38 = 0x2, k0F3A = 0x3 };
585 STATIC_ASSERT(kPointerSize == kInt64Size || kPointerSize == kInt32Size);
587 #define DECLARE_INSTRUCTION(instruction) \ 589 void instruction##p(P1 p1) { \ 590 emit_##instruction(p1, kPointerSize); \ 594 void instruction##l(P1 p1) { \ 595 emit_##instruction(p1, kInt32Size); \ 599 void instruction##q(P1 p1) { \ 600 emit_##instruction(p1, kInt64Size); \ 603 template<class P1, class P2> \ 604 void instruction##p(P1 p1, P2 p2) { \ 605 emit_##instruction(p1, p2, kPointerSize); \ 608 template<class P1, class P2> \ 609 void instruction##l(P1 p1, P2 p2) { \ 610 emit_##instruction(p1, p2, kInt32Size); \ 613 template<class P1, class P2> \ 614 void instruction##q(P1 p1, P2 p2) { \ 615 emit_##instruction(p1, p2, kInt64Size); \ 618 template<class P1, class P2, class P3> \ 619 void instruction##p(P1 p1, P2 p2, P3 p3) { \ 620 emit_##instruction(p1, p2, p3, kPointerSize); \ 623 template<class P1, class P2, class P3> \ 624 void instruction##l(P1 p1, P2 p2, P3 p3) { \ 625 emit_##instruction(p1, p2, p3, kInt32Size); \ 628 template<class P1, class P2, class P3> \ 629 void instruction##q(P1 p1, P2 p2, P3 p3) { \ 630 emit_##instruction(p1, p2, p3, kInt64Size); \ 632 ASSEMBLER_INSTRUCTION_LIST(DECLARE_INSTRUCTION)
633 #undef DECLARE_INSTRUCTION 641 void DataAlign(
int m);
642 void Nop(
int bytes = 1);
644 void CodeTargetAlign();
650 void pushq(Immediate value);
653 void pushq_imm32(int32_t imm32);
654 void pushq(Register src);
655 void pushq(Operand src);
657 void popq(Register dst);
658 void popq(Operand dst);
660 void enter(Immediate size);
664 void movb(Register dst, Operand src);
665 void movb(Register dst, Immediate imm);
666 void movb(Operand dst, Register src);
667 void movb(Operand dst, Immediate imm);
671 void movw(Register dst, Operand src);
672 void movw(Operand dst, Register src);
673 void movw(Operand dst, Immediate imm);
677 void movl(Operand dst, Label* src);
680 void movp(Register dst, Address ptr, RelocInfo::Mode rmode);
689 void movp_heap_number(Register dst,
double value);
691 void movp_string(Register dst,
const StringConstantBase* str);
694 void movq(Register dst,
int64_t value,
695 RelocInfo::Mode rmode = RelocInfo::NONE);
696 void movq(Register dst, uint64_t value,
697 RelocInfo::Mode rmode = RelocInfo::NONE);
699 void movsxbl(Register dst, Register src);
700 void movsxbl(Register dst, Operand src);
701 void movsxbq(Register dst, Register src);
702 void movsxbq(Register dst, Operand src);
703 void movsxwl(Register dst, Register src);
704 void movsxwl(Register dst, Operand src);
705 void movsxwq(Register dst, Register src);
706 void movsxwq(Register dst, Operand src);
707 void movsxlq(Register dst, Register src);
708 void movsxlq(Register dst, Operand src);
714 void repmovsp() { emit_repmovs(kPointerSize); }
715 void repmovsl() { emit_repmovs(kInt32Size); }
716 void repmovsq() { emit_repmovs(kInt64Size); }
719 void load_rax(Address value, RelocInfo::Mode rmode);
720 void load_rax(ExternalReference ext);
723 void cmovq(Condition cc, Register dst, Register src);
724 void cmovq(Condition cc, Register dst, Operand src);
725 void cmovl(Condition cc, Register dst, Register src);
726 void cmovl(Condition cc, Register dst, Operand src);
728 void cmpb(Register dst, Immediate src) {
729 immediate_arithmetic_op_8(0x7, dst, src);
732 void cmpb_al(Immediate src);
734 void cmpb(Register dst, Register src) {
735 arithmetic_op_8(0x3A, dst, src);
738 void cmpb(Register dst, Operand src) { arithmetic_op_8(0x3A, dst, src); }
740 void cmpb(Operand dst, Register src) { arithmetic_op_8(0x38, src, dst); }
742 void cmpb(Operand dst, Immediate src) {
743 immediate_arithmetic_op_8(0x7, dst, src);
746 void cmpw(Operand dst, Immediate src) {
747 immediate_arithmetic_op_16(0x7, dst, src);
750 void cmpw(Register dst, Immediate src) {
751 immediate_arithmetic_op_16(0x7, dst, src);
754 void cmpw(Register dst, Operand src) { arithmetic_op_16(0x3B, dst, src); }
756 void cmpw(Register dst, Register src) {
757 arithmetic_op_16(0x3B, dst, src);
760 void cmpw(Operand dst, Register src) { arithmetic_op_16(0x39, src, dst); }
762 void testb(Register reg, Operand op) { testb(op, reg); }
764 void testw(Register reg, Operand op) { testw(op, reg); }
766 void andb(Register dst, Immediate src) {
767 immediate_arithmetic_op_8(0x4, dst, src);
770 void decb(Register dst);
771 void decb(Operand dst);
776 void xchgb(Register reg, Operand op);
777 void xchgw(Register reg, Operand op);
779 void cmpxchgb(Operand dst, Register src);
780 void cmpxchgw(Operand dst, Register src);
788 void mull(Register src);
789 void mull(Operand src);
791 void mulq(Register src);
793 #define DECLARE_SHIFT_INSTRUCTION(instruction, subcode) \ 794 void instruction##p(Register dst, Immediate imm8) { \ 795 shift(dst, imm8, subcode, kPointerSize); \ 798 void instruction##l(Register dst, Immediate imm8) { \ 799 shift(dst, imm8, subcode, kInt32Size); \ 802 void instruction##q(Register dst, Immediate imm8) { \ 803 shift(dst, imm8, subcode, kInt64Size); \ 806 void instruction##p(Operand dst, Immediate imm8) { \ 807 shift(dst, imm8, subcode, kPointerSize); \ 810 void instruction##l(Operand dst, Immediate imm8) { \ 811 shift(dst, imm8, subcode, kInt32Size); \ 814 void instruction##q(Operand dst, Immediate imm8) { \ 815 shift(dst, imm8, subcode, kInt64Size); \ 818 void instruction##p_cl(Register dst) { shift(dst, subcode, kPointerSize); } \ 820 void instruction##l_cl(Register dst) { shift(dst, subcode, kInt32Size); } \ 822 void instruction##q_cl(Register dst) { shift(dst, subcode, kInt64Size); } \ 824 void instruction##p_cl(Operand dst) { shift(dst, subcode, kPointerSize); } \ 826 void instruction##l_cl(Operand dst) { shift(dst, subcode, kInt32Size); } \ 828 void instruction##q_cl(Operand dst) { shift(dst, subcode, kInt64Size); } 829 SHIFT_INSTRUCTION_LIST(DECLARE_SHIFT_INSTRUCTION)
830 #undef DECLARE_SHIFT_INSTRUCTION 833 void shld(Register dst, Register src);
836 void shrd(Register dst, Register src);
838 void store_rax(Address dst, RelocInfo::Mode mode);
839 void store_rax(ExternalReference ref);
841 void subb(Register dst, Immediate src) {
842 immediate_arithmetic_op_8(0x5, dst, src);
847 void testb(Register dst, Register src);
848 void testb(Register reg, Immediate mask);
849 void testb(Operand op, Immediate mask);
850 void testb(Operand op, Register reg);
852 void testw(Register dst, Register src);
853 void testw(Register reg, Immediate mask);
854 void testw(Operand op, Immediate mask);
855 void testw(Operand op, Register reg);
858 void bswapl(Register dst);
859 void bswapq(Register dst);
860 void btq(Operand dst, Register src);
861 void btsq(Operand dst, Register src);
862 void btsq(Register dst, Immediate imm8);
863 void btrq(Register dst, Immediate imm8);
864 void bsrq(Register dst, Register src);
865 void bsrq(Register dst, Operand src);
866 void bsrl(Register dst, Register src);
867 void bsrl(Register dst, Operand src);
868 void bsfq(Register dst, Register src);
869 void bsfq(Register dst, Operand src);
870 void bsfl(Register dst, Register src);
871 void bsfl(Register dst, Operand src);
882 void setcc(Condition cc, Register reg);
884 void pshufw(XMMRegister dst, XMMRegister src, uint8_t shuffle);
885 void pshufw(XMMRegister dst, Operand src, uint8_t shuffle);
886 void pblendw(XMMRegister dst, Operand src, uint8_t mask);
887 void pblendw(XMMRegister dst, XMMRegister src, uint8_t mask);
888 void palignr(XMMRegister dst, Operand src, uint8_t mask);
889 void palignr(XMMRegister dst, XMMRegister src, uint8_t mask);
911 void call(Address entry, RelocInfo::Mode rmode);
912 void near_call(Address entry, RelocInfo::Mode rmode);
913 void near_jmp(Address entry, RelocInfo::Mode rmode);
914 void call(CodeStub* stub);
915 void call(Handle<Code> target,
916 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET);
922 void call(Address target);
925 void call(Register adr);
931 void jmp(Label* L, Label::Distance distance = Label::kFar);
932 void jmp(Handle<Code> target, RelocInfo::Mode rmode);
935 void jmp(Register adr);
936 void jmp(Operand src);
941 Label::Distance distance = Label::kFar);
942 void j(Condition cc, Address entry, RelocInfo::Mode rmode);
943 void j(Condition cc, Handle<Code> target, RelocInfo::Mode rmode);
953 void fld_s(Operand adr);
954 void fld_d(Operand adr);
956 void fstp_s(Operand adr);
957 void fstp_d(Operand adr);
958 void fstp(
int index);
960 void fild_s(Operand adr);
961 void fild_d(Operand adr);
963 void fist_s(Operand adr);
965 void fistp_s(Operand adr);
966 void fistp_d(Operand adr);
968 void fisttp_s(Operand adr);
969 void fisttp_d(Operand adr);
979 void fisub_s(Operand adr);
981 void faddp(
int i = 1);
982 void fsubp(
int i = 1);
983 void fsubrp(
int i = 1);
984 void fmulp(
int i = 1);
985 void fdivp(
int i = 1);
989 void fxch(
int i = 1);
991 void ffree(
int i = 0);
1017 void addss(XMMRegister dst, XMMRegister src);
1018 void addss(XMMRegister dst, Operand src);
1019 void subss(XMMRegister dst, XMMRegister src);
1020 void subss(XMMRegister dst, Operand src);
1021 void mulss(XMMRegister dst, XMMRegister src);
1022 void mulss(XMMRegister dst, Operand src);
1023 void divss(XMMRegister dst, XMMRegister src);
1024 void divss(XMMRegister dst, Operand src);
1026 void maxss(XMMRegister dst, XMMRegister src);
1027 void maxss(XMMRegister dst, Operand src);
1028 void minss(XMMRegister dst, XMMRegister src);
1029 void minss(XMMRegister dst, Operand src);
1031 void sqrtss(XMMRegister dst, XMMRegister src);
1032 void sqrtss(XMMRegister dst, Operand src);
1034 void ucomiss(XMMRegister dst, XMMRegister src);
1035 void ucomiss(XMMRegister dst, Operand src);
1036 void movaps(XMMRegister dst, XMMRegister src);
1042 void movss(XMMRegister dst, XMMRegister src);
1044 void movss(XMMRegister dst, Operand src);
1045 void movss(Operand dst, XMMRegister src);
1046 void shufps(XMMRegister dst, XMMRegister src, byte imm8);
1048 void cvttss2si(Register dst, Operand src);
1049 void cvttss2si(Register dst, XMMRegister src);
1050 void cvtlsi2ss(XMMRegister dst, Operand src);
1051 void cvtlsi2ss(XMMRegister dst, Register src);
1053 void andps(XMMRegister dst, XMMRegister src);
1054 void andps(XMMRegister dst, Operand src);
1055 void orps(XMMRegister dst, XMMRegister src);
1056 void orps(XMMRegister dst, Operand src);
1057 void xorps(XMMRegister dst, XMMRegister src);
1058 void xorps(XMMRegister dst, Operand src);
1060 void addps(XMMRegister dst, XMMRegister src);
1061 void addps(XMMRegister dst, Operand src);
1062 void subps(XMMRegister dst, XMMRegister src);
1063 void subps(XMMRegister dst, Operand src);
1064 void mulps(XMMRegister dst, XMMRegister src);
1065 void mulps(XMMRegister dst, Operand src);
1066 void divps(XMMRegister dst, XMMRegister src);
1067 void divps(XMMRegister dst, Operand src);
1069 void movmskps(Register dst, XMMRegister src);
1071 void vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2,
1072 SIMDPrefix pp, LeadingOpcode m, VexW w);
1073 void vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2,
1074 SIMDPrefix pp, LeadingOpcode m, VexW w);
1077 void sse2_instr(XMMRegister dst, XMMRegister src, byte prefix, byte escape,
1079 void sse2_instr(XMMRegister dst, Operand src, byte prefix, byte escape,
1081 #define DECLARE_SSE2_INSTRUCTION(instruction, prefix, escape, opcode) \ 1082 void instruction(XMMRegister dst, XMMRegister src) { \ 1083 sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode); \ 1085 void instruction(XMMRegister dst, Operand src) { \ 1086 sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode); \ 1089 SSE2_INSTRUCTION_LIST(DECLARE_SSE2_INSTRUCTION)
1090 #undef DECLARE_SSE2_INSTRUCTION 1092 #define DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \ 1093 void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \ 1094 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \ 1096 void v##instruction(XMMRegister dst, XMMRegister src1, Operand src2) { \ 1097 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \ 1100 SSE2_INSTRUCTION_LIST(DECLARE_SSE2_AVX_INSTRUCTION)
1101 #undef DECLARE_SSE2_AVX_INSTRUCTION 1104 void lddqu(XMMRegister dst, Operand src);
1107 void ssse3_instr(XMMRegister dst, XMMRegister src, byte prefix, byte escape1,
1108 byte escape2, byte opcode);
1109 void ssse3_instr(XMMRegister dst, Operand src, byte prefix, byte escape1,
1110 byte escape2, byte opcode);
1112 #define DECLARE_SSSE3_INSTRUCTION(instruction, prefix, escape1, escape2, \ 1114 void instruction(XMMRegister dst, XMMRegister src) { \ 1115 ssse3_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \ 1117 void instruction(XMMRegister dst, Operand src) { \ 1118 ssse3_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \ 1121 SSSE3_INSTRUCTION_LIST(DECLARE_SSSE3_INSTRUCTION)
1122 #undef DECLARE_SSSE3_INSTRUCTION 1125 void sse4_instr(XMMRegister dst, XMMRegister src, byte prefix, byte escape1,
1126 byte escape2, byte opcode);
1127 void sse4_instr(XMMRegister dst, Operand src, byte prefix, byte escape1,
1128 byte escape2, byte opcode);
1129 #define DECLARE_SSE4_INSTRUCTION(instruction, prefix, escape1, escape2, \ 1131 void instruction(XMMRegister dst, XMMRegister src) { \ 1132 sse4_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \ 1134 void instruction(XMMRegister dst, Operand src) { \ 1135 sse4_instr(dst, src, 0x##prefix, 0x##escape1, 0x##escape2, 0x##opcode); \ 1138 SSE4_INSTRUCTION_LIST(DECLARE_SSE4_INSTRUCTION)
1139 #undef DECLARE_SSE4_INSTRUCTION 1141 #define DECLARE_SSE34_AVX_INSTRUCTION(instruction, prefix, escape1, escape2, \ 1143 void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \ 1144 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \ 1146 void v##instruction(XMMRegister dst, XMMRegister src1, Operand src2) { \ 1147 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape1##escape2, kW0); \ 1150 SSSE3_INSTRUCTION_LIST(DECLARE_SSE34_AVX_INSTRUCTION)
1151 SSE4_INSTRUCTION_LIST(DECLARE_SSE34_AVX_INSTRUCTION)
1152 #undef DECLARE_SSE34_AVX_INSTRUCTION 1154 void movd(XMMRegister dst, Register src);
1155 void movd(XMMRegister dst, Operand src);
1156 void movd(Register dst, XMMRegister src);
1157 void movq(XMMRegister dst, Register src);
1158 void movq(Register dst, XMMRegister src);
1159 void movq(XMMRegister dst, XMMRegister src);
1165 void movsd(XMMRegister dst, XMMRegister src);
1167 void movsd(Operand dst, XMMRegister src);
1168 void movsd(XMMRegister dst, Operand src);
1170 void movdqa(Operand dst, XMMRegister src);
1171 void movdqa(XMMRegister dst, Operand src);
1173 void movdqu(Operand dst, XMMRegister src);
1174 void movdqu(XMMRegister dst, Operand src);
1176 void movapd(XMMRegister dst, XMMRegister src);
1177 void movupd(XMMRegister dst, Operand src);
1178 void movupd(Operand dst, XMMRegister src);
1180 void psllq(XMMRegister reg, byte imm8);
1181 void psrlq(XMMRegister reg, byte imm8);
1182 void psllw(XMMRegister reg, byte imm8);
1183 void pslld(XMMRegister reg, byte imm8);
1184 void psrlw(XMMRegister reg, byte imm8);
1185 void psrld(XMMRegister reg, byte imm8);
1186 void psraw(XMMRegister reg, byte imm8);
1187 void psrad(XMMRegister reg, byte imm8);
1189 void cvttsd2si(Register dst, Operand src);
1190 void cvttsd2si(Register dst, XMMRegister src);
1191 void cvttss2siq(Register dst, XMMRegister src);
1192 void cvttss2siq(Register dst, Operand src);
1193 void cvttsd2siq(Register dst, XMMRegister src);
1194 void cvttsd2siq(Register dst, Operand src);
1195 void cvttps2dq(XMMRegister dst, Operand src);
1196 void cvttps2dq(XMMRegister dst, XMMRegister src);
1198 void cvtlsi2sd(XMMRegister dst, Operand src);
1199 void cvtlsi2sd(XMMRegister dst, Register src);
1201 void cvtqsi2ss(XMMRegister dst, Operand src);
1202 void cvtqsi2ss(XMMRegister dst, Register src);
1204 void cvtqsi2sd(XMMRegister dst, Operand src);
1205 void cvtqsi2sd(XMMRegister dst, Register src);
1208 void cvtss2sd(XMMRegister dst, XMMRegister src);
1209 void cvtss2sd(XMMRegister dst, Operand src);
1210 void cvtsd2ss(XMMRegister dst, XMMRegister src);
1211 void cvtsd2ss(XMMRegister dst, Operand src);
1213 void cvtsd2si(Register dst, XMMRegister src);
1214 void cvtsd2siq(Register dst, XMMRegister src);
1216 void addsd(XMMRegister dst, XMMRegister src);
1217 void addsd(XMMRegister dst, Operand src);
1218 void subsd(XMMRegister dst, XMMRegister src);
1219 void subsd(XMMRegister dst, Operand src);
1220 void mulsd(XMMRegister dst, XMMRegister src);
1221 void mulsd(XMMRegister dst, Operand src);
1222 void divsd(XMMRegister dst, XMMRegister src);
1223 void divsd(XMMRegister dst, Operand src);
1225 void maxsd(XMMRegister dst, XMMRegister src);
1226 void maxsd(XMMRegister dst, Operand src);
1227 void minsd(XMMRegister dst, XMMRegister src);
1228 void minsd(XMMRegister dst, Operand src);
1230 void andpd(XMMRegister dst, XMMRegister src);
1231 void andpd(XMMRegister dst, Operand src);
1232 void orpd(XMMRegister dst, XMMRegister src);
1233 void orpd(XMMRegister dst, Operand src);
1234 void xorpd(XMMRegister dst, XMMRegister src);
1235 void xorpd(XMMRegister dst, Operand src);
1236 void sqrtsd(XMMRegister dst, XMMRegister src);
1237 void sqrtsd(XMMRegister dst, Operand src);
1239 void haddps(XMMRegister dst, XMMRegister src);
1240 void haddps(XMMRegister dst, Operand src);
1242 void ucomisd(XMMRegister dst, XMMRegister src);
1243 void ucomisd(XMMRegister dst, Operand src);
1244 void cmpltsd(XMMRegister dst, XMMRegister src);
1246 void movmskpd(Register dst, XMMRegister src);
1249 void insertps(XMMRegister dst, XMMRegister src, byte imm8);
1250 void extractps(Register dst, XMMRegister src, byte imm8);
1251 void pextrb(Register dst, XMMRegister src, int8_t imm8);
1252 void pextrb(Operand dst, XMMRegister src, int8_t imm8);
1253 void pextrw(Register dst, XMMRegister src, int8_t imm8);
1254 void pextrw(Operand dst, XMMRegister src, int8_t imm8);
1255 void pextrd(Register dst, XMMRegister src, int8_t imm8);
1256 void pextrd(Operand dst, XMMRegister src, int8_t imm8);
1257 void pinsrb(XMMRegister dst, Register src, int8_t imm8);
1258 void pinsrb(XMMRegister dst, Operand src, int8_t imm8);
1259 void pinsrw(XMMRegister dst, Register src, int8_t imm8);
1260 void pinsrw(XMMRegister dst, Operand src, int8_t imm8);
1261 void pinsrd(XMMRegister dst, Register src, int8_t imm8);
1262 void pinsrd(XMMRegister dst, Operand src, int8_t imm8);
1264 void roundss(XMMRegister dst, XMMRegister src, RoundingMode mode);
1265 void roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode);
1267 void cmpps(XMMRegister dst, XMMRegister src, int8_t cmp);
1268 void cmpps(XMMRegister dst, Operand src, int8_t cmp);
1269 void cmppd(XMMRegister dst, XMMRegister src, int8_t cmp);
1270 void cmppd(XMMRegister dst, Operand src, int8_t cmp);
1272 #define SSE_CMP_P(instr, imm8) \ 1273 void instr##ps(XMMRegister dst, XMMRegister src) { cmpps(dst, src, imm8); } \ 1274 void instr##ps(XMMRegister dst, Operand src) { cmpps(dst, src, imm8); } \ 1275 void instr##pd(XMMRegister dst, XMMRegister src) { cmppd(dst, src, imm8); } \ 1276 void instr##pd(XMMRegister dst, Operand src) { cmppd(dst, src, imm8); } 1278 SSE_CMP_P(cmpeq, 0x0);
1279 SSE_CMP_P(cmplt, 0x1);
1280 SSE_CMP_P(cmple, 0x2);
1281 SSE_CMP_P(cmpneq, 0x4);
1282 SSE_CMP_P(cmpnlt, 0x5);
1283 SSE_CMP_P(cmpnle, 0x6);
1287 void minps(XMMRegister dst, XMMRegister src);
1288 void minps(XMMRegister dst, Operand src);
1289 void maxps(XMMRegister dst, XMMRegister src);
1290 void maxps(XMMRegister dst, Operand src);
1291 void rcpps(XMMRegister dst, XMMRegister src);
1292 void rcpps(XMMRegister dst, Operand src);
1293 void rsqrtps(XMMRegister dst, XMMRegister src);
1294 void rsqrtps(XMMRegister dst, Operand src);
1295 void sqrtps(XMMRegister dst, XMMRegister src);
1296 void sqrtps(XMMRegister dst, Operand src);
1297 void movups(XMMRegister dst, XMMRegister src);
1298 void movups(XMMRegister dst, Operand src);
1299 void movups(Operand dst, XMMRegister src);
1300 void psrldq(XMMRegister dst, uint8_t shift);
1301 void pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle);
1302 void pshufd(XMMRegister dst, Operand src, uint8_t shuffle);
1303 void pshufhw(XMMRegister dst, XMMRegister src, uint8_t shuffle);
1304 void pshuflw(XMMRegister dst, XMMRegister src, uint8_t shuffle);
1305 void cvtdq2ps(XMMRegister dst, XMMRegister src);
1306 void cvtdq2ps(XMMRegister dst, Operand src);
1309 void vfmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1310 vfmasd(0x99, dst, src1, src2);
1312 void vfmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1313 vfmasd(0xa9, dst, src1, src2);
1315 void vfmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1316 vfmasd(0xb9, dst, src1, src2);
1318 void vfmadd132sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1319 vfmasd(0x99, dst, src1, src2);
1321 void vfmadd213sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1322 vfmasd(0xa9, dst, src1, src2);
1324 void vfmadd231sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1325 vfmasd(0xb9, dst, src1, src2);
1327 void vfmsub132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1328 vfmasd(0x9b, dst, src1, src2);
1330 void vfmsub213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1331 vfmasd(0xab, dst, src1, src2);
1333 void vfmsub231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1334 vfmasd(0xbb, dst, src1, src2);
1336 void vfmsub132sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1337 vfmasd(0x9b, dst, src1, src2);
1339 void vfmsub213sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1340 vfmasd(0xab, dst, src1, src2);
1342 void vfmsub231sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1343 vfmasd(0xbb, dst, src1, src2);
1345 void vfnmadd132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1346 vfmasd(0x9d, dst, src1, src2);
1348 void vfnmadd213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1349 vfmasd(0xad, dst, src1, src2);
1351 void vfnmadd231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1352 vfmasd(0xbd, dst, src1, src2);
1354 void vfnmadd132sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1355 vfmasd(0x9d, dst, src1, src2);
1357 void vfnmadd213sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1358 vfmasd(0xad, dst, src1, src2);
1360 void vfnmadd231sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1361 vfmasd(0xbd, dst, src1, src2);
1363 void vfnmsub132sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1364 vfmasd(0x9f, dst, src1, src2);
1366 void vfnmsub213sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1367 vfmasd(0xaf, dst, src1, src2);
1369 void vfnmsub231sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1370 vfmasd(0xbf, dst, src1, src2);
1372 void vfnmsub132sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1373 vfmasd(0x9f, dst, src1, src2);
1375 void vfnmsub213sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1376 vfmasd(0xaf, dst, src1, src2);
1378 void vfnmsub231sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1379 vfmasd(0xbf, dst, src1, src2);
1381 void vfmasd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
1382 void vfmasd(byte op, XMMRegister dst, XMMRegister src1, Operand src2);
1384 void vfmadd132ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1385 vfmass(0x99, dst, src1, src2);
1387 void vfmadd213ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1388 vfmass(0xa9, dst, src1, src2);
1390 void vfmadd231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1391 vfmass(0xb9, dst, src1, src2);
1393 void vfmadd132ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1394 vfmass(0x99, dst, src1, src2);
1396 void vfmadd213ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1397 vfmass(0xa9, dst, src1, src2);
1399 void vfmadd231ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1400 vfmass(0xb9, dst, src1, src2);
1402 void vfmsub132ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1403 vfmass(0x9b, dst, src1, src2);
1405 void vfmsub213ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1406 vfmass(0xab, dst, src1, src2);
1408 void vfmsub231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1409 vfmass(0xbb, dst, src1, src2);
1411 void vfmsub132ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1412 vfmass(0x9b, dst, src1, src2);
1414 void vfmsub213ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1415 vfmass(0xab, dst, src1, src2);
1417 void vfmsub231ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1418 vfmass(0xbb, dst, src1, src2);
1420 void vfnmadd132ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1421 vfmass(0x9d, dst, src1, src2);
1423 void vfnmadd213ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1424 vfmass(0xad, dst, src1, src2);
1426 void vfnmadd231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1427 vfmass(0xbd, dst, src1, src2);
1429 void vfnmadd132ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1430 vfmass(0x9d, dst, src1, src2);
1432 void vfnmadd213ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1433 vfmass(0xad, dst, src1, src2);
1435 void vfnmadd231ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1436 vfmass(0xbd, dst, src1, src2);
1438 void vfnmsub132ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1439 vfmass(0x9f, dst, src1, src2);
1441 void vfnmsub213ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1442 vfmass(0xaf, dst, src1, src2);
1444 void vfnmsub231ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1445 vfmass(0xbf, dst, src1, src2);
1447 void vfnmsub132ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1448 vfmass(0x9f, dst, src1, src2);
1450 void vfnmsub213ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1451 vfmass(0xaf, dst, src1, src2);
1453 void vfnmsub231ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1454 vfmass(0xbf, dst, src1, src2);
1456 void vfmass(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
1457 void vfmass(byte op, XMMRegister dst, XMMRegister src1, Operand src2);
1459 void vmovd(XMMRegister dst, Register src);
1460 void vmovd(XMMRegister dst, Operand src);
1461 void vmovd(Register dst, XMMRegister src);
1462 void vmovq(XMMRegister dst, Register src);
1463 void vmovq(XMMRegister dst, Operand src);
1464 void vmovq(Register dst, XMMRegister src);
1466 void vmovsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1467 vsd(0x10, dst, src1, src2);
1469 void vmovsd(XMMRegister dst, Operand src) { vsd(0x10, dst, xmm0, src); }
1470 void vmovsd(Operand dst, XMMRegister src) { vsd(0x11, src, xmm0, dst); }
1472 #define AVX_SP_3(instr, opcode) \ 1473 AVX_S_3(instr, opcode) \ 1474 AVX_P_3(instr, opcode) 1476 #define AVX_S_3(instr, opcode) \ 1477 AVX_3(instr##ss, opcode, vss) \ 1478 AVX_3(instr##sd, opcode, vsd) 1480 #define AVX_P_3(instr, opcode) \ 1481 AVX_3(instr##ps, opcode, vps) \ 1482 AVX_3(instr##pd, opcode, vpd) 1484 #define AVX_3(instr, opcode, impl) \ 1485 void instr(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \ 1486 impl(opcode, dst, src1, src2); \ 1488 void instr(XMMRegister dst, XMMRegister src1, Operand src2) { \ 1489 impl(opcode, dst, src1, src2); \ 1492 AVX_SP_3(vsqrt, 0x51);
1493 AVX_SP_3(vadd, 0x58);
1494 AVX_SP_3(vsub, 0x5c);
1495 AVX_SP_3(vmul, 0x59);
1496 AVX_SP_3(vdiv, 0x5e);
1497 AVX_SP_3(vmin, 0x5d);
1498 AVX_SP_3(vmax, 0x5f);
1499 AVX_P_3(vand, 0x54);
1501 AVX_P_3(vxor, 0x57);
1502 AVX_3(vcvtsd2ss, 0x5a, vsd);
1503 AVX_3(vhaddps, 0x7c, vsd);
1510 void vpsrlq(XMMRegister dst, XMMRegister src, byte imm8) {
1511 vpd(0x73, xmm2, dst, src);
1514 void vpsllq(XMMRegister dst, XMMRegister src, byte imm8) {
1515 vpd(0x73, xmm6, dst, src);
1518 void vcvtss2sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1519 vinstr(0x5a, dst, src1, src2, kF3, k0F, kWIG);
1521 void vcvtss2sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1522 vinstr(0x5a, dst, src1, src2, kF3, k0F, kWIG);
1524 void vcvtlsi2sd(XMMRegister dst, XMMRegister src1, Register src2) {
1525 XMMRegister isrc2 = XMMRegister::from_code(src2.code());
1526 vinstr(0x2a, dst, src1, isrc2, kF2, k0F, kW0);
1528 void vcvtlsi2sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1529 vinstr(0x2a, dst, src1, src2, kF2, k0F, kW0);
1531 void vcvtlsi2ss(XMMRegister dst, XMMRegister src1, Register src2) {
1532 XMMRegister isrc2 = XMMRegister::from_code(src2.code());
1533 vinstr(0x2a, dst, src1, isrc2, kF3, k0F, kW0);
1535 void vcvtlsi2ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1536 vinstr(0x2a, dst, src1, src2, kF3, k0F, kW0);
1538 void vcvtqsi2ss(XMMRegister dst, XMMRegister src1, Register src2) {
1539 XMMRegister isrc2 = XMMRegister::from_code(src2.code());
1540 vinstr(0x2a, dst, src1, isrc2, kF3, k0F, kW1);
1542 void vcvtqsi2ss(XMMRegister dst, XMMRegister src1, Operand src2) {
1543 vinstr(0x2a, dst, src1, src2, kF3, k0F, kW1);
1545 void vcvtqsi2sd(XMMRegister dst, XMMRegister src1, Register src2) {
1546 XMMRegister isrc2 = XMMRegister::from_code(src2.code());
1547 vinstr(0x2a, dst, src1, isrc2, kF2, k0F, kW1);
1549 void vcvtqsi2sd(XMMRegister dst, XMMRegister src1, Operand src2) {
1550 vinstr(0x2a, dst, src1, src2, kF2, k0F, kW1);
1552 void vcvttss2si(Register dst, XMMRegister src) {
1553 XMMRegister idst = XMMRegister::from_code(dst.code());
1554 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW0);
1556 void vcvttss2si(Register dst, Operand src) {
1557 XMMRegister idst = XMMRegister::from_code(dst.code());
1558 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW0);
1560 void vcvttsd2si(Register dst, XMMRegister src) {
1561 XMMRegister idst = XMMRegister::from_code(dst.code());
1562 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW0);
1564 void vcvttsd2si(Register dst, Operand src) {
1565 XMMRegister idst = XMMRegister::from_code(dst.code());
1566 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW0);
1568 void vcvttss2siq(Register dst, XMMRegister src) {
1569 XMMRegister idst = XMMRegister::from_code(dst.code());
1570 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW1);
1572 void vcvttss2siq(Register dst, Operand src) {
1573 XMMRegister idst = XMMRegister::from_code(dst.code());
1574 vinstr(0x2c, idst, xmm0, src, kF3, k0F, kW1);
1576 void vcvttsd2siq(Register dst, XMMRegister src) {
1577 XMMRegister idst = XMMRegister::from_code(dst.code());
1578 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW1);
1580 void vcvttsd2siq(Register dst, Operand src) {
1581 XMMRegister idst = XMMRegister::from_code(dst.code());
1582 vinstr(0x2c, idst, xmm0, src, kF2, k0F, kW1);
1584 void vcvtsd2si(Register dst, XMMRegister src) {
1585 XMMRegister idst = XMMRegister::from_code(dst.code());
1586 vinstr(0x2d, idst, xmm0, src, kF2, k0F, kW0);
1588 void vucomisd(XMMRegister dst, XMMRegister src) {
1589 vinstr(0x2e, dst, xmm0, src, k66, k0F, kWIG);
1591 void vucomisd(XMMRegister dst, Operand src) {
1592 vinstr(0x2e, dst, xmm0, src, k66, k0F, kWIG);
1594 void vroundss(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1595 RoundingMode mode) {
1596 vinstr(0x0a, dst, src1, src2, k66, k0F3A, kWIG);
1597 emit(static_cast<byte>(mode) | 0x8);
1599 void vroundsd(XMMRegister dst, XMMRegister src1, XMMRegister src2,
1600 RoundingMode mode) {
1601 vinstr(0x0b, dst, src1, src2, k66, k0F3A, kWIG);
1602 emit(static_cast<byte>(mode) | 0x8);
1605 void vsd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1606 vinstr(op, dst, src1, src2, kF2, k0F, kWIG);
1608 void vsd(byte op, XMMRegister dst, XMMRegister src1, Operand src2) {
1609 vinstr(op, dst, src1, src2, kF2, k0F, kWIG);
1612 void vmovss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
1613 vss(0x10, dst, src1, src2);
1615 void vmovss(XMMRegister dst, Operand src) { vss(0x10, dst, xmm0, src); }
1616 void vmovss(Operand dst, XMMRegister src) { vss(0x11, src, xmm0, dst); }
1617 void vucomiss(XMMRegister dst, XMMRegister src);
1618 void vucomiss(XMMRegister dst, Operand src);
1619 void vss(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
1620 void vss(byte op, XMMRegister dst, XMMRegister src1, Operand src2);
1622 void vmovaps(XMMRegister dst, XMMRegister src) { vps(0x28, dst, xmm0, src); }
1623 void vmovups(XMMRegister dst, XMMRegister src) { vps(0x10, dst, xmm0, src); }
1624 void vmovups(XMMRegister dst, Operand src) { vps(0x10, dst, xmm0, src); }
1625 void vmovups(Operand dst, XMMRegister src) { vps(0x11, src, xmm0, dst); }
1626 void vmovapd(XMMRegister dst, XMMRegister src) { vpd(0x28, dst, xmm0, src); }
1627 void vmovupd(XMMRegister dst, Operand src) { vpd(0x10, dst, xmm0, src); }
1628 void vmovupd(Operand dst, XMMRegister src) { vpd(0x11, src, xmm0, dst); }
1629 void vmovmskps(Register dst, XMMRegister src) {
1630 XMMRegister idst = XMMRegister::from_code(dst.code());
1631 vps(0x50, idst, xmm0, src);
1633 void vmovmskpd(Register dst, XMMRegister src) {
1634 XMMRegister idst = XMMRegister::from_code(dst.code());
1635 vpd(0x50, idst, xmm0, src);
1637 void vcmpps(XMMRegister dst, XMMRegister src1, XMMRegister src2, int8_t cmp) {
1638 vps(0xC2, dst, src1, src2);
1641 void vcmpps(XMMRegister dst, XMMRegister src1, Operand src2, int8_t cmp) {
1642 vps(0xC2, dst, src1, src2);
1645 void vcmppd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int8_t cmp) {
1646 vpd(0xC2, dst, src1, src2);
1649 void vcmppd(XMMRegister dst, XMMRegister src1, Operand src2, int8_t cmp) {
1650 vpd(0xC2, dst, src1, src2);
1654 #define AVX_CMP_P(instr, imm8) \ 1655 void instr##ps(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \ 1656 vcmpps(dst, src1, src2, imm8); \ 1658 void instr##ps(XMMRegister dst, XMMRegister src1, Operand src2) { \ 1659 vcmpps(dst, src1, src2, imm8); \ 1661 void instr##pd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \ 1662 vcmppd(dst, src1, src2, imm8); \ 1664 void instr##pd(XMMRegister dst, XMMRegister src1, Operand src2) { \ 1665 vcmppd(dst, src1, src2, imm8); \ 1668 AVX_CMP_P(vcmpeq, 0x0);
1669 AVX_CMP_P(vcmplt, 0x1);
1670 AVX_CMP_P(vcmple, 0x2);
1671 AVX_CMP_P(vcmpneq, 0x4);
1672 AVX_CMP_P(vcmpnlt, 0x5);
1673 AVX_CMP_P(vcmpnle, 0x6);
1677 void vlddqu(XMMRegister dst, Operand src) {
1678 vinstr(0xF0, dst, xmm0, src, kF2, k0F, kWIG);
1680 void vpsllw(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1681 vinstr(0x71, xmm6, dst, src, k66, k0F, kWIG);
1684 void vpsrlw(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1685 vinstr(0x71, xmm2, dst, src, k66, k0F, kWIG);
1688 void vpsraw(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1689 vinstr(0x71, xmm4, dst, src, k66, k0F, kWIG);
1692 void vpslld(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1693 vinstr(0x72, xmm6, dst, src, k66, k0F, kWIG);
1696 void vpsrld(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1697 vinstr(0x72, xmm2, dst, src, k66, k0F, kWIG);
1700 void vpsrad(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1701 vinstr(0x72, xmm4, dst, src, k66, k0F, kWIG);
1704 void vpextrb(Register dst, XMMRegister src, uint8_t imm8) {
1705 XMMRegister idst = XMMRegister::from_code(dst.code());
1706 vinstr(0x14, src, xmm0, idst, k66, k0F3A, kW0);
1709 void vpextrb(Operand dst, XMMRegister src, uint8_t imm8) {
1710 vinstr(0x14, src, xmm0, dst, k66, k0F3A, kW0);
1713 void vpextrw(Register dst, XMMRegister src, uint8_t imm8) {
1714 XMMRegister idst = XMMRegister::from_code(dst.code());
1715 vinstr(0xc5, idst, xmm0, src, k66, k0F, kW0);
1718 void vpextrw(Operand dst, XMMRegister src, uint8_t imm8) {
1719 vinstr(0x15, src, xmm0, dst, k66, k0F3A, kW0);
1722 void vpextrd(Register dst, XMMRegister src, uint8_t imm8) {
1723 XMMRegister idst = XMMRegister::from_code(dst.code());
1724 vinstr(0x16, src, xmm0, idst, k66, k0F3A, kW0);
1727 void vpextrd(Operand dst, XMMRegister src, uint8_t imm8) {
1728 vinstr(0x16, src, xmm0, dst, k66, k0F3A, kW0);
1731 void vpinsrb(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) {
1732 XMMRegister isrc = XMMRegister::from_code(src2.code());
1733 vinstr(0x20, dst, src1, isrc, k66, k0F3A, kW0);
1736 void vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) {
1737 vinstr(0x20, dst, src1, src2, k66, k0F3A, kW0);
1740 void vpinsrw(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) {
1741 XMMRegister isrc = XMMRegister::from_code(src2.code());
1742 vinstr(0xc4, dst, src1, isrc, k66, k0F, kW0);
1745 void vpinsrw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) {
1746 vinstr(0xc4, dst, src1, src2, k66, k0F, kW0);
1749 void vpinsrd(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) {
1750 XMMRegister isrc = XMMRegister::from_code(src2.code());
1751 vinstr(0x22, dst, src1, isrc, k66, k0F3A, kW0);
1754 void vpinsrd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) {
1755 vinstr(0x22, dst, src1, src2, k66, k0F3A, kW0);
1758 void vpshufd(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1759 vinstr(0x70, dst, xmm0, src, k66, k0F, kWIG);
1763 void vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
1764 void vps(byte op, XMMRegister dst, XMMRegister src1, Operand src2);
1765 void vpd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
1766 void vpd(byte op, XMMRegister dst, XMMRegister src1, Operand src2);
1769 void andnq(Register dst, Register src1, Register src2) {
1770 bmi1q(0xf2, dst, src1, src2);
1772 void andnq(Register dst, Register src1, Operand src2) {
1773 bmi1q(0xf2, dst, src1, src2);
1775 void andnl(Register dst, Register src1, Register src2) {
1776 bmi1l(0xf2, dst, src1, src2);
1778 void andnl(Register dst, Register src1, Operand src2) {
1779 bmi1l(0xf2, dst, src1, src2);
1781 void bextrq(Register dst, Register src1, Register src2) {
1782 bmi1q(0xf7, dst, src2, src1);
1784 void bextrq(Register dst, Operand src1, Register src2) {
1785 bmi1q(0xf7, dst, src2, src1);
1787 void bextrl(Register dst, Register src1, Register src2) {
1788 bmi1l(0xf7, dst, src2, src1);
1790 void bextrl(Register dst, Operand src1, Register src2) {
1791 bmi1l(0xf7, dst, src2, src1);
1793 void blsiq(Register dst, Register src) { bmi1q(0xf3, rbx, dst, src); }
1794 void blsiq(Register dst, Operand src) { bmi1q(0xf3, rbx, dst, src); }
1795 void blsil(Register dst, Register src) { bmi1l(0xf3, rbx, dst, src); }
1796 void blsil(Register dst, Operand src) { bmi1l(0xf3, rbx, dst, src); }
1797 void blsmskq(Register dst, Register src) { bmi1q(0xf3, rdx, dst, src); }
1798 void blsmskq(Register dst, Operand src) { bmi1q(0xf3, rdx, dst, src); }
1799 void blsmskl(Register dst, Register src) { bmi1l(0xf3, rdx, dst, src); }
1800 void blsmskl(Register dst, Operand src) { bmi1l(0xf3, rdx, dst, src); }
1801 void blsrq(Register dst, Register src) { bmi1q(0xf3, rcx, dst, src); }
1802 void blsrq(Register dst, Operand src) { bmi1q(0xf3, rcx, dst, src); }
1803 void blsrl(Register dst, Register src) { bmi1l(0xf3, rcx, dst, src); }
1804 void blsrl(Register dst, Operand src) { bmi1l(0xf3, rcx, dst, src); }
1805 void tzcntq(Register dst, Register src);
1806 void tzcntq(Register dst, Operand src);
1807 void tzcntl(Register dst, Register src);
1808 void tzcntl(Register dst, Operand src);
1810 void lzcntq(Register dst, Register src);
1811 void lzcntq(Register dst, Operand src);
1812 void lzcntl(Register dst, Register src);
1813 void lzcntl(Register dst, Operand src);
1815 void popcntq(Register dst, Register src);
1816 void popcntq(Register dst, Operand src);
1817 void popcntl(Register dst, Register src);
1818 void popcntl(Register dst, Operand src);
1820 void bzhiq(Register dst, Register src1, Register src2) {
1821 bmi2q(kNone, 0xf5, dst, src2, src1);
1823 void bzhiq(Register dst, Operand src1, Register src2) {
1824 bmi2q(kNone, 0xf5, dst, src2, src1);
1826 void bzhil(Register dst, Register src1, Register src2) {
1827 bmi2l(kNone, 0xf5, dst, src2, src1);
1829 void bzhil(Register dst, Operand src1, Register src2) {
1830 bmi2l(kNone, 0xf5, dst, src2, src1);
1832 void mulxq(Register dst1, Register dst2, Register src) {
1833 bmi2q(kF2, 0xf6, dst1, dst2, src);
1835 void mulxq(Register dst1, Register dst2, Operand src) {
1836 bmi2q(kF2, 0xf6, dst1, dst2, src);
1838 void mulxl(Register dst1, Register dst2, Register src) {
1839 bmi2l(kF2, 0xf6, dst1, dst2, src);
1841 void mulxl(Register dst1, Register dst2, Operand src) {
1842 bmi2l(kF2, 0xf6, dst1, dst2, src);
1844 void pdepq(Register dst, Register src1, Register src2) {
1845 bmi2q(kF2, 0xf5, dst, src1, src2);
1847 void pdepq(Register dst, Register src1, Operand src2) {
1848 bmi2q(kF2, 0xf5, dst, src1, src2);
1850 void pdepl(Register dst, Register src1, Register src2) {
1851 bmi2l(kF2, 0xf5, dst, src1, src2);
1853 void pdepl(Register dst, Register src1, Operand src2) {
1854 bmi2l(kF2, 0xf5, dst, src1, src2);
1856 void pextq(Register dst, Register src1, Register src2) {
1857 bmi2q(kF3, 0xf5, dst, src1, src2);
1859 void pextq(Register dst, Register src1, Operand src2) {
1860 bmi2q(kF3, 0xf5, dst, src1, src2);
1862 void pextl(Register dst, Register src1, Register src2) {
1863 bmi2l(kF3, 0xf5, dst, src1, src2);
1865 void pextl(Register dst, Register src1, Operand src2) {
1866 bmi2l(kF3, 0xf5, dst, src1, src2);
1868 void sarxq(Register dst, Register src1, Register src2) {
1869 bmi2q(kF3, 0xf7, dst, src2, src1);
1871 void sarxq(Register dst, Operand src1, Register src2) {
1872 bmi2q(kF3, 0xf7, dst, src2, src1);
1874 void sarxl(Register dst, Register src1, Register src2) {
1875 bmi2l(kF3, 0xf7, dst, src2, src1);
1877 void sarxl(Register dst, Operand src1, Register src2) {
1878 bmi2l(kF3, 0xf7, dst, src2, src1);
1880 void shlxq(Register dst, Register src1, Register src2) {
1881 bmi2q(k66, 0xf7, dst, src2, src1);
1883 void shlxq(Register dst, Operand src1, Register src2) {
1884 bmi2q(k66, 0xf7, dst, src2, src1);
1886 void shlxl(Register dst, Register src1, Register src2) {
1887 bmi2l(k66, 0xf7, dst, src2, src1);
1889 void shlxl(Register dst, Operand src1, Register src2) {
1890 bmi2l(k66, 0xf7, dst, src2, src1);
1892 void shrxq(Register dst, Register src1, Register src2) {
1893 bmi2q(kF2, 0xf7, dst, src2, src1);
1895 void shrxq(Register dst, Operand src1, Register src2) {
1896 bmi2q(kF2, 0xf7, dst, src2, src1);
1898 void shrxl(Register dst, Register src1, Register src2) {
1899 bmi2l(kF2, 0xf7, dst, src2, src1);
1901 void shrxl(Register dst, Operand src1, Register src2) {
1902 bmi2l(kF2, 0xf7, dst, src2, src1);
1904 void rorxq(Register dst, Register src, byte imm8);
1905 void rorxq(Register dst, Operand src, byte imm8);
1906 void rorxl(Register dst, Register src, byte imm8);
1907 void rorxl(Register dst, Operand src, byte imm8);
1913 int SizeOfCodeGeneratedSince(Label* label) {
1914 return pc_offset() - label->pos();
1919 void RecordComment(
const char* msg);
1923 void RecordDeoptReason(DeoptimizeReason reason, SourcePosition position,
1929 void db(uint8_t data);
1931 void dq(uint64_t data);
1933 void dq(Label* label);
1936 void PatchConstPool();
1939 static bool UseConstPoolFor(RelocInfo::Mode rmode);
1944 inline bool buffer_overflow()
const {
1945 return pc_ >= reloc_info_writer.pos() - kGap;
1949 inline int available_space()
const {
1950 return static_cast<int>(reloc_info_writer.pos() - pc_);
1953 static bool IsNop(Address addr);
1956 static constexpr
int kMaximalBufferSize = 512 * MB;
1958 byte byte_at(
int pos) {
return buffer_[pos]; }
1959 void set_byte_at(
int pos, byte value) { buffer_[pos] = value; }
1963 void call(Operand operand);
1966 byte* addr_at(
int pos) {
return buffer_ + pos; }
1968 return *
reinterpret_cast<uint32_t*
>(addr_at(pos));
1970 void long_at_put(
int pos,
uint32_t x) {
1971 *
reinterpret_cast<uint32_t*
>(addr_at(pos)) = x;
1977 void emit(byte x) { *pc_++ = x; }
1979 inline void emitp(Address x, RelocInfo::Mode rmode);
1980 inline void emitq(uint64_t x);
1981 inline void emitw(uint16_t x);
1982 inline void emit_runtime_entry(Address entry, RelocInfo::Mode rmode);
1983 inline void emit(Immediate x);
1989 inline void emit_rex_64(XMMRegister reg, Register rm_reg);
1990 inline void emit_rex_64(Register reg, XMMRegister rm_reg);
1991 inline void emit_rex_64(Register reg, Register rm_reg);
1992 inline void emit_rex_64(XMMRegister reg, XMMRegister rm_reg);
1999 inline void emit_rex_64(Register reg, Operand op);
2000 inline void emit_rex_64(XMMRegister reg, Operand op);
2006 inline void emit_rex_64(Register rm_reg);
2013 inline void emit_rex_64(Operand op);
2016 void emit_rex_64() { emit(0x48); }
2020 inline void emit_rex_32(Register reg, Register rm_reg);
2025 inline void emit_rex_32(Register reg, Operand op);
2029 inline void emit_rex_32(Register rm_reg);
2033 inline void emit_rex_32(Operand op);
2037 inline void emit_optional_rex_32(Register reg, Register rm_reg);
2043 inline void emit_optional_rex_32(Register reg, Operand op);
2047 inline void emit_optional_rex_32(XMMRegister reg, XMMRegister base);
2051 inline void emit_optional_rex_32(XMMRegister reg, Register base);
2055 inline void emit_optional_rex_32(Register reg, XMMRegister base);
2059 inline void emit_optional_rex_32(XMMRegister reg, Operand op);
2063 inline void emit_optional_rex_32(Register rm_reg);
2064 inline void emit_optional_rex_32(XMMRegister rm_reg);
2068 inline void emit_optional_rex_32(Operand op);
2070 void emit_rex(
int size) {
2071 if (size == kInt64Size) {
2074 DCHECK_EQ(size, kInt32Size);
2079 void emit_rex(P1 p1,
int size) {
2080 if (size == kInt64Size) {
2083 DCHECK_EQ(size, kInt32Size);
2084 emit_optional_rex_32(p1);
2088 template<
class P1,
class P2>
2089 void emit_rex(P1 p1, P2 p2,
int size) {
2090 if (size == kInt64Size) {
2091 emit_rex_64(p1, p2);
2093 DCHECK_EQ(size, kInt32Size);
2094 emit_optional_rex_32(p1, p2);
2099 void emit_vex2_byte0() { emit(0xc5); }
2100 inline void emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l,
2102 void emit_vex3_byte0() { emit(0xc4); }
2103 inline void emit_vex3_byte1(XMMRegister reg, XMMRegister rm, LeadingOpcode m);
2104 inline void emit_vex3_byte1(XMMRegister reg, Operand rm, LeadingOpcode m);
2105 inline void emit_vex3_byte2(VexW w, XMMRegister v, VectorLength l,
2107 inline void emit_vex_prefix(XMMRegister reg, XMMRegister v, XMMRegister rm,
2108 VectorLength l, SIMDPrefix pp, LeadingOpcode m,
2110 inline void emit_vex_prefix(Register reg, Register v, Register rm,
2111 VectorLength l, SIMDPrefix pp, LeadingOpcode m,
2113 inline void emit_vex_prefix(XMMRegister reg, XMMRegister v, Operand rm,
2114 VectorLength l, SIMDPrefix pp, LeadingOpcode m,
2116 inline void emit_vex_prefix(Register reg, Register v, Operand rm,
2117 VectorLength l, SIMDPrefix pp, LeadingOpcode m,
2124 void emit_operand(Register reg, Operand adr) {
2125 emit_operand(reg.low_bits(), adr);
2131 void emit_operand(
int rm, Operand adr);
2134 void emit_modrm(Register reg, Register rm_reg) {
2135 emit(0xC0 | reg.low_bits() << 3 | rm_reg.low_bits());
2140 void emit_modrm(
int code, Register rm_reg) {
2141 DCHECK(is_uint3(code));
2142 emit(0xC0 | code << 3 | rm_reg.low_bits());
2146 inline void emit_code_relative_offset(Label* label);
2149 void emit_sse_operand(XMMRegister dst, XMMRegister src);
2150 void emit_sse_operand(XMMRegister reg, Operand adr);
2151 void emit_sse_operand(Register reg, Operand adr);
2152 void emit_sse_operand(XMMRegister dst, Register src);
2153 void emit_sse_operand(Register dst, XMMRegister src);
2154 void emit_sse_operand(XMMRegister dst);
2160 void arithmetic_op_8(byte opcode, Register reg, Register rm_reg);
2161 void arithmetic_op_8(byte opcode, Register reg, Operand rm_reg);
2162 void arithmetic_op_16(byte opcode, Register reg, Register rm_reg);
2163 void arithmetic_op_16(byte opcode, Register reg, Operand rm_reg);
2165 void arithmetic_op(byte opcode, Register reg, Register rm_reg,
int size);
2166 void arithmetic_op(byte opcode, Register reg, Operand rm_reg,
int size);
2168 void immediate_arithmetic_op_8(byte subcode,
2171 void immediate_arithmetic_op_8(byte subcode, Operand dst, Immediate src);
2173 void immediate_arithmetic_op_16(byte subcode,
2176 void immediate_arithmetic_op_16(byte subcode, Operand dst, Immediate src);
2178 void immediate_arithmetic_op(byte subcode,
2182 void immediate_arithmetic_op(byte subcode, Operand dst, Immediate src,
2186 void shift(Operand dst, Immediate shift_amount,
int subcode,
int size);
2187 void shift(Register dst, Immediate shift_amount,
int subcode,
int size);
2189 void shift(Register dst,
int subcode,
int size);
2190 void shift(Operand dst,
int subcode,
int size);
2192 void emit_farith(
int b1,
int b2,
int i);
2196 void bind_to(Label* L,
int pos);
2199 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0);
2202 void emit_add(Register dst, Register src,
int size) {
2203 arithmetic_op(0x03, dst, src, size);
2206 void emit_add(Register dst, Immediate src,
int size) {
2207 immediate_arithmetic_op(0x0, dst, src, size);
2210 void emit_add(Register dst, Operand src,
int size) {
2211 arithmetic_op(0x03, dst, src, size);
2214 void emit_add(Operand dst, Register src,
int size) {
2215 arithmetic_op(0x1, src, dst, size);
2218 void emit_add(Operand dst, Immediate src,
int size) {
2219 immediate_arithmetic_op(0x0, dst, src, size);
2222 void emit_and(Register dst, Register src,
int size) {
2223 arithmetic_op(0x23, dst, src, size);
2226 void emit_and(Register dst, Operand src,
int size) {
2227 arithmetic_op(0x23, dst, src, size);
2230 void emit_and(Operand dst, Register src,
int size) {
2231 arithmetic_op(0x21, src, dst, size);
2234 void emit_and(Register dst, Immediate src,
int size) {
2235 immediate_arithmetic_op(0x4, dst, src, size);
2238 void emit_and(Operand dst, Immediate src,
int size) {
2239 immediate_arithmetic_op(0x4, dst, src, size);
2242 void emit_cmp(Register dst, Register src,
int size) {
2243 arithmetic_op(0x3B, dst, src, size);
2246 void emit_cmp(Register dst, Operand src,
int size) {
2247 arithmetic_op(0x3B, dst, src, size);
2250 void emit_cmp(Operand dst, Register src,
int size) {
2251 arithmetic_op(0x39, src, dst, size);
2254 void emit_cmp(Register dst, Immediate src,
int size) {
2255 immediate_arithmetic_op(0x7, dst, src, size);
2258 void emit_cmp(Operand dst, Immediate src,
int size) {
2259 immediate_arithmetic_op(0x7, dst, src, size);
2265 void emit_cmpxchg(Operand dst, Register src,
int size);
2267 void emit_dec(Register dst,
int size);
2268 void emit_dec(Operand dst,
int size);
2273 void emit_idiv(Register src,
int size);
2274 void emit_div(Register src,
int size);
2278 void emit_imul(Register src,
int size);
2279 void emit_imul(Operand src,
int size);
2280 void emit_imul(Register dst, Register src,
int size);
2281 void emit_imul(Register dst, Operand src,
int size);
2282 void emit_imul(Register dst, Register src, Immediate imm,
int size);
2283 void emit_imul(Register dst, Operand src, Immediate imm,
int size);
2285 void emit_inc(Register dst,
int size);
2286 void emit_inc(Operand dst,
int size);
2288 void emit_lea(Register dst, Operand src,
int size);
2290 void emit_mov(Register dst, Operand src,
int size);
2291 void emit_mov(Register dst, Register src,
int size);
2292 void emit_mov(Operand dst, Register src,
int size);
2293 void emit_mov(Register dst, Immediate value,
int size);
2294 void emit_mov(Operand dst, Immediate value,
int size);
2296 void emit_movzxb(Register dst, Operand src,
int size);
2297 void emit_movzxb(Register dst, Register src,
int size);
2298 void emit_movzxw(Register dst, Operand src,
int size);
2299 void emit_movzxw(Register dst, Register src,
int size);
2301 void emit_neg(Register dst,
int size);
2302 void emit_neg(Operand dst,
int size);
2304 void emit_not(Register dst,
int size);
2305 void emit_not(Operand dst,
int size);
2307 void emit_or(Register dst, Register src,
int size) {
2308 arithmetic_op(0x0B, dst, src, size);
2311 void emit_or(Register dst, Operand src,
int size) {
2312 arithmetic_op(0x0B, dst, src, size);
2315 void emit_or(Operand dst, Register src,
int size) {
2316 arithmetic_op(0x9, src, dst, size);
2319 void emit_or(Register dst, Immediate src,
int size) {
2320 immediate_arithmetic_op(0x1, dst, src, size);
2323 void emit_or(Operand dst, Immediate src,
int size) {
2324 immediate_arithmetic_op(0x1, dst, src, size);
2327 void emit_repmovs(
int size);
2329 void emit_sbb(Register dst, Register src,
int size) {
2330 arithmetic_op(0x1b, dst, src, size);
2333 void emit_sub(Register dst, Register src,
int size) {
2334 arithmetic_op(0x2B, dst, src, size);
2337 void emit_sub(Register dst, Immediate src,
int size) {
2338 immediate_arithmetic_op(0x5, dst, src, size);
2341 void emit_sub(Register dst, Operand src,
int size) {
2342 arithmetic_op(0x2B, dst, src, size);
2345 void emit_sub(Operand dst, Register src,
int size) {
2346 arithmetic_op(0x29, src, dst, size);
2349 void emit_sub(Operand dst, Immediate src,
int size) {
2350 immediate_arithmetic_op(0x5, dst, src, size);
2353 void emit_test(Register dst, Register src,
int size);
2354 void emit_test(Register reg, Immediate mask,
int size);
2355 void emit_test(Operand op, Register reg,
int size);
2356 void emit_test(Operand op, Immediate mask,
int size);
2357 void emit_test(Register reg, Operand op,
int size) {
2358 return emit_test(op, reg, size);
2361 void emit_xchg(Register dst, Register src,
int size);
2362 void emit_xchg(Register dst, Operand src,
int size);
2364 void emit_xor(Register dst, Register src,
int size) {
2365 if (size == kInt64Size && dst.code() == src.code()) {
2368 arithmetic_op(0x33, dst, src, kInt32Size);
2370 arithmetic_op(0x33, dst, src, size);
2374 void emit_xor(Register dst, Operand src,
int size) {
2375 arithmetic_op(0x33, dst, src, size);
2378 void emit_xor(Register dst, Immediate src,
int size) {
2379 immediate_arithmetic_op(0x6, dst, src, size);
2382 void emit_xor(Operand dst, Immediate src,
int size) {
2383 immediate_arithmetic_op(0x6, dst, src, size);
2386 void emit_xor(Operand dst, Register src,
int size) {
2387 arithmetic_op(0x31, src, dst, size);
2391 void bmi1q(byte op, Register reg, Register vreg, Register rm);
2392 void bmi1q(byte op, Register reg, Register vreg, Operand rm);
2393 void bmi1l(byte op, Register reg, Register vreg, Register rm);
2394 void bmi1l(byte op, Register reg, Register vreg, Operand rm);
2395 void bmi2q(SIMDPrefix pp, byte op, Register reg, Register vreg, Register rm);
2396 void bmi2q(SIMDPrefix pp, byte op, Register reg, Register vreg, Operand rm);
2397 void bmi2l(SIMDPrefix pp, byte op, Register reg, Register vreg, Register rm);
2398 void bmi2l(SIMDPrefix pp, byte op, Register reg, Register vreg, Operand rm);
2401 void record_farjmp_position(Label* L,
int pos);
2403 bool is_optimizable_farjmp(
int idx);
2405 void AllocateAndInstallRequestedHeapObjects(Isolate* isolate);
2407 friend class EnsureSpace;
2408 friend class RegExpMacroAssemblerX64;
2411 RelocInfoWriter reloc_info_writer;
2416 std::deque<int> internal_reference_positions_;
2419 int farjmp_num_ = 0;
2420 std::deque<int> farjmp_positions_;
2421 std::map<Label*, std::vector<int>> label_farjmp_maps_;
2423 ConstPool constpool_;
2425 friend class ConstPool;
2435 explicit EnsureSpace(Assembler* assembler) : assembler_(assembler) {
2436 if (assembler_->buffer_overflow()) assembler_->GrowBuffer();
2438 space_before_ = assembler_->available_space();
2444 int bytes_generated = space_before_ - assembler_->available_space();
2445 DCHECK(bytes_generated < assembler_->kGap);
2450 Assembler* assembler_;
2457 DEFINE_REGISTER_NAMES(Register, GENERAL_REGISTERS)
2458 DEFINE_REGISTER_NAMES(XMMRegister, DOUBLE_REGISTERS)
2463 #endif // V8_X64_ASSEMBLER_X64_H_