40 #ifndef V8_ARM_ASSEMBLER_ARM_H_ 41 #define V8_ARM_ASSEMBLER_ARM_H_ 46 #include "src/arm/constants-arm.h" 47 #include "src/assembler.h" 48 #include "src/boxed-float.h" 49 #include "src/constant-pool.h" 50 #include "src/double.h" 56 #define GENERAL_REGISTERS(V) \ 57 V(r0) V(r1) V(r2) V(r3) V(r4) V(r5) V(r6) V(r7) \ 58 V(r8) V(r9) V(r10) V(fp) V(ip) V(sp) V(lr) V(pc) 60 #define ALLOCATABLE_GENERAL_REGISTERS(V) \ 61 V(r0) V(r1) V(r2) V(r3) V(r4) V(r5) V(r6) V(r7) \ 64 #define FLOAT_REGISTERS(V) \ 65 V(s0) V(s1) V(s2) V(s3) V(s4) V(s5) V(s6) V(s7) \ 66 V(s8) V(s9) V(s10) V(s11) V(s12) V(s13) V(s14) V(s15) \ 67 V(s16) V(s17) V(s18) V(s19) V(s20) V(s21) V(s22) V(s23) \ 68 V(s24) V(s25) V(s26) V(s27) V(s28) V(s29) V(s30) V(s31) 70 #define LOW_DOUBLE_REGISTERS(V) \ 71 V(d0) V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \ 72 V(d8) V(d9) V(d10) V(d11) V(d12) V(d13) V(d14) V(d15) 74 #define NON_LOW_DOUBLE_REGISTERS(V) \ 75 V(d16) V(d17) V(d18) V(d19) V(d20) V(d21) V(d22) V(d23) \ 76 V(d24) V(d25) V(d26) V(d27) V(d28) V(d29) V(d30) V(d31) 78 #define DOUBLE_REGISTERS(V) \ 79 LOW_DOUBLE_REGISTERS(V) NON_LOW_DOUBLE_REGISTERS(V) 81 #define SIMD128_REGISTERS(V) \ 82 V(q0) V(q1) V(q2) V(q3) V(q4) V(q5) V(q6) V(q7) \ 83 V(q8) V(q9) V(q10) V(q11) V(q12) V(q13) V(q14) V(q15) 85 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ 86 V(d0) V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \ 87 V(d8) V(d9) V(d10) V(d11) V(d12) \ 88 V(d16) V(d17) V(d18) V(d19) V(d20) V(d21) V(d22) V(d23) \ 89 V(d24) V(d25) V(d26) V(d27) V(d28) V(d29) V(d30) V(d31) 91 #define ALLOCATABLE_NO_VFP32_DOUBLE_REGISTERS(V) \ 92 V(d0) V(d1) V(d2) V(d3) V(d4) V(d5) V(d6) V(d7) \ 93 V(d8) V(d9) V(d10) V(d11) V(d12) V(d15) 95 #define C_REGISTERS(V) \ 96 V(cr0) V(cr1) V(cr2) V(cr3) V(cr4) V(cr5) V(cr6) V(cr7) \ 97 V(cr8) V(cr9) V(cr10) V(cr11) V(cr12) V(cr15) 103 const int kR9Available = 1;
107 const int kNumRegs = 16;
110 const RegList kJSCallerSaved =
116 const int kNumJSCallerSaved = 4;
119 const RegList kCalleeSaved =
131 const RegList kCallerSaved =
138 const int kNumCalleeSaved = 7 + kR9Available;
141 const int kNumDoubleCalleeSaved = 8;
146 const int kNumSafepointRegisters = 16;
151 const RegList kSafepointSavedRegisters = kJSCallerSaved | kCalleeSaved;
152 const int kNumSafepointSavedRegisters = kNumJSCallerSaved + kNumCalleeSaved;
155 #define REGISTER_CODE(R) kRegCode_##R, 156 GENERAL_REGISTERS(REGISTER_CODE)
166 ASSERT_TRIVIALLY_COPYABLE(
Register);
167 static_assert(
sizeof(
Register) ==
sizeof(
int),
168 "Register can efficiently be passed by value");
171 #define DECLARE_REGISTER(R) \ 172 constexpr Register R = Register::from_code<kRegCode_##R>(); 173 GENERAL_REGISTERS(DECLARE_REGISTER)
174 #undef DECLARE_REGISTER 175 constexpr
Register no_reg = Register::no_reg();
177 constexpr
bool kPadArguments =
false;
178 constexpr
bool kSimpleFPAliasing =
false;
179 constexpr
bool kSimdMaskRegisters =
false;
181 enum SwVfpRegisterCode {
182 #define REGISTER_CODE(R) kSwVfpCode_##R, 183 FLOAT_REGISTERS(REGISTER_CODE)
197 typedef uint64_t VfpRegList;
202 static constexpr
int kSizeInBytes = 4;
204 static void split_code(
int reg_code,
int* vm,
int* m) {
205 DCHECK(from_code(reg_code).is_valid());
209 void split_code(
int* vm,
int* m)
const { split_code(code(), vm, m); }
210 VfpRegList ToVfpRegList()
const {
213 return uint64_t{0x1} << code();
223 "SwVfpRegister can efficiently be passed by value");
227 enum DoubleRegisterCode {
228 #define REGISTER_CODE(R) kDoubleCode_##R, 229 DOUBLE_REGISTERS(REGISTER_CODE)
237 static constexpr
int kSizeInBytes = 8;
239 inline static int NumRegisters();
241 static void split_code(
int reg_code,
int* vm,
int* m) {
242 DCHECK(from_code(reg_code).is_valid());
243 *m = (reg_code & 0x10) >> 4;
244 *vm = reg_code & 0x0F;
246 void split_code(
int* vm,
int* m)
const { split_code(code(), vm, m); }
247 VfpRegList ToVfpRegList()
const {
250 return uint64_t{0x3} << (code() * 2);
261 "DwVfpRegister can efficiently be passed by value");
268 :
public RegisterBase<LowDwVfpRegister, kDoubleCode_d16> {
272 SwVfpRegister low()
const {
return SwVfpRegister::from_code(code() * 2); }
274 return SwVfpRegister::from_code(code() * 2 + 1);
276 VfpRegList ToVfpRegList()
const {
279 return uint64_t{0x3} << (code() * 2);
287 enum Simd128RegisterCode {
288 #define REGISTER_CODE(R) kSimd128Code_##R, 289 SIMD128_REGISTERS(REGISTER_CODE)
297 static void split_code(
int reg_code,
int* vm,
int* m) {
298 DCHECK(from_code(reg_code).is_valid());
299 int encoded_code = reg_code << 1;
300 *m = (encoded_code & 0x10) >> 4;
301 *vm = encoded_code & 0x0F;
303 void split_code(
int* vm,
int* m)
const { split_code(code(), vm, m); }
304 DwVfpRegister low()
const {
return DwVfpRegister::from_code(code() * 2); }
306 return DwVfpRegister::from_code(code() * 2 + 1);
308 VfpRegList ToVfpRegList()
const {
311 return uint64_t{0xf} << (code() * 4);
325 #define REGISTER_CODE(R) kCCode_##R, 326 C_REGISTERS(REGISTER_CODE)
339 #define DECLARE_FLOAT_REGISTER(R) \ 340 constexpr SwVfpRegister R = SwVfpRegister::from_code<kSwVfpCode_##R>(); 341 FLOAT_REGISTERS(DECLARE_FLOAT_REGISTER)
342 #undef DECLARE_FLOAT_REGISTER 344 #define DECLARE_LOW_DOUBLE_REGISTER(R) \ 345 constexpr LowDwVfpRegister R = LowDwVfpRegister::from_code<kDoubleCode_##R>(); 346 LOW_DOUBLE_REGISTERS(DECLARE_LOW_DOUBLE_REGISTER)
347 #undef DECLARE_LOW_DOUBLE_REGISTER 349 #define DECLARE_DOUBLE_REGISTER(R) \ 350 constexpr DwVfpRegister R = DwVfpRegister::from_code<kDoubleCode_##R>(); 351 NON_LOW_DOUBLE_REGISTERS(DECLARE_DOUBLE_REGISTER)
352 #undef DECLARE_DOUBLE_REGISTER 356 #define DECLARE_SIMD128_REGISTER(R) \ 357 constexpr Simd128Register R = Simd128Register::from_code<kSimd128Code_##R>(); 358 SIMD128_REGISTERS(DECLARE_SIMD128_REGISTER)
359 #undef DECLARE_SIMD128_REGISTER 366 constexpr
CRegister no_creg = CRegister::no_reg();
368 #define DECLARE_C_REGISTER(R) \ 369 constexpr CRegister R = CRegister::from_code<kCCode_##R>(); 370 C_REGISTERS(DECLARE_C_REGISTER)
371 #undef DECLARE_C_REGISTER 400 V8_INLINE
explicit Operand(int32_t immediate,
401 RelocInfo::Mode rmode = RelocInfo::NONE);
402 V8_INLINE
static Operand Zero();
413 return Operand(rm, ASR, kSmiTagSize);
416 STATIC_ASSERT(kSmiTag == 0 && kSmiTagSize < kPointerSizeLog2);
417 return Operand(key, LSL, kPointerSizeLog2 - kSmiTagSize);
420 STATIC_ASSERT(kSmiTag == 0 && kSmiTagSize < kDoubleSizeLog2);
421 return Operand(key, LSL, kDoubleSizeLog2 - kSmiTagSize);
427 static Operand EmbeddedNumber(
double number);
432 bool IsRegister()
const {
433 return rm_.is_valid() && rs_ == no_reg && shift_op_ == LSL &&
437 bool IsImmediateShiftedRegister()
const {
438 return rm_.is_valid() && !rs_.is_valid();
441 bool IsRegisterShiftedRegister()
const {
442 return rm_.is_valid() && rs_.is_valid();
456 int InstructionsRequired(
const Assembler* assembler, Instr instr = 0)
const;
457 bool MustOutputRelocInfo(
const Assembler* assembler)
const;
459 inline int32_t immediate()
const {
460 DCHECK(IsImmediate());
461 DCHECK(!IsHeapObjectRequest());
462 return value_.immediate;
464 bool IsImmediate()
const {
465 return !rm_.is_valid();
469 DCHECK(IsHeapObjectRequest());
470 return value_.heap_object_request;
472 bool IsHeapObjectRequest()
const {
473 DCHECK_IMPLIES(is_heap_object_request_, IsImmediate());
474 DCHECK_IMPLIES(is_heap_object_request_,
475 rmode_ == RelocInfo::EMBEDDED_OBJECT ||
476 rmode_ == RelocInfo::CODE_TARGET);
477 return is_heap_object_request_;
482 ShiftOp shift_op()
const {
return shift_op_; }
495 bool is_heap_object_request_ =
false;
496 RelocInfo::Mode rmode_;
522 ShiftOp shift_op,
int shift_imm, AddrMode am = Offset);
525 AddrMode am = Offset) {
526 STATIC_ASSERT(kSmiTag == 0 && kSmiTagSize < kPointerSizeLog2);
527 return MemOperand(array, key, LSL, kPointerSizeLog2 - kSmiTagSize, am);
530 void set_offset(int32_t offset) {
531 DCHECK(rm_ == no_reg);
536 DCHECK(rm_ == no_reg);
542 AddrMode am()
const {
return am_; }
544 bool OffsetIsUint12Encodable()
const {
545 return offset_ >= 0 ? is_uint12(offset_) : is_uint12(-offset_);
573 int align()
const {
return align_; }
576 void SetAlignment(
int align);
588 : base_(base), register_count_(register_count) {}
590 : base_(q_reg.low()), register_count_(2) {}
592 int register_count() {
return register_count_; }
593 int length()
const {
return register_count_ - 1; }
594 NeonListType
type()
const {
595 switch (register_count_) {
596 default: UNREACHABLE();
598 case 1:
return nlt_1;
599 case 2:
return nlt_2;
600 case 3:
return nlt_3;
601 case 4:
return nlt_4;
628 virtual void AbortedCodeGeneration() {
629 pending_32_bit_constants_.clear();
657 int branch_offset(
Label* L);
661 V8_INLINE
static bool is_constant_pool_load(
Address pc);
671 V8_INLINE
static void set_target_address_at(
673 ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED);
677 V8_INLINE
static Address target_address_from_return_address(
Address pc);
681 V8_INLINE
static Address return_address_from_call_start(
Address pc);
685 inline static void deserialization_set_special_target_at(
689 inline static int deserialization_special_target_size(
Address location);
692 inline static void deserialization_set_target_internal_reference_at(
694 RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE);
699 static constexpr
int kSpecialTargetSize = kPointerSize;
701 RegList* GetScratchRegisterList() {
return &scratch_register_list_; }
702 VfpRegList* GetScratchVfpRegisterList() {
703 return &scratch_vfp_register_list_;
715 void DataAlign(
int m);
717 void CodeTargetAlign();
720 void b(
int branch_offset, Condition cond = al,
721 RelocInfo::Mode rmode = RelocInfo::NONE);
722 void bl(
int branch_offset, Condition cond = al,
723 RelocInfo::Mode rmode = RelocInfo::NONE);
724 void blx(
int branch_offset);
725 void blx(
Register target, Condition cond = al);
726 void bx(
Register target, Condition cond = al);
729 void b(
Label* L, Condition cond = al);
730 void b(Condition cond,
Label* L) { b(L, cond); }
731 void bl(
Label* L, Condition cond = al);
732 void bl(Condition cond,
Label* L) { bl(L, cond); }
738 SBit s = LeaveCC, Condition cond = al);
740 Condition cond = al);
743 SBit s = LeaveCC, Condition cond = al);
745 Condition cond = al);
748 SBit s = LeaveCC, Condition cond = al);
750 SBit s = LeaveCC, Condition cond = al);
753 SBit s = LeaveCC, Condition cond = al);
756 SBit s = LeaveCC, Condition cond = al);
758 SBit s = LeaveCC, Condition cond = al);
761 SBit s = LeaveCC, Condition cond = al);
764 SBit s = LeaveCC, Condition cond = al);
767 SBit s = LeaveCC, Condition cond = al);
777 void cmp_raw_immediate(
Register src1,
int raw_immediate, Condition cond = al);
782 SBit s = LeaveCC, Condition cond = al);
784 SBit s = LeaveCC, Condition cond = al);
787 SBit s = LeaveCC, Condition cond = al);
788 void mov(
Register dst,
Register src, SBit s = LeaveCC, Condition cond = al);
800 SBit s = LeaveCC, Condition cond = al);
803 SBit s = LeaveCC, Condition cond = al);
808 Condition cond = al);
811 Condition cond = al);
814 Condition cond = al);
819 SBit s = LeaveCC, Condition cond = al);
822 Condition cond = al);
825 Condition cond = al);
830 SBit s = LeaveCC, Condition cond = al);
833 Condition cond = al);
838 SBit s = LeaveCC, Condition cond = al);
841 SBit s = LeaveCC, Condition cond = al);
844 SBit s = LeaveCC, Condition cond = al);
847 SBit s = LeaveCC, Condition cond = al);
870 void usat(
Register dst,
int satpos,
const Operand& src, Condition cond = al);
875 Condition cond = al);
878 Condition cond = al);
880 void bfc(
Register dst,
int lsb,
int width, Condition cond = al);
883 Condition cond = al);
886 Condition cond = al);
889 Condition cond = al);
893 Condition cond = al);
896 Condition cond = al);
900 Condition cond = al);
901 void uxtb16(
Register dst,
Register src,
int rotate = 0, Condition cond = al);
904 Condition cond = al);
912 void mrs(
Register dst, SRegister s, Condition cond = al);
932 void ldr_pcrel(
Register dst,
int imm12, Condition cond = al);
943 Condition cond = al);
949 void ldm(BlockAddrMode am,
Register base,
RegList dst, Condition cond = al);
950 void stm(BlockAddrMode am,
Register base,
RegList src, Condition cond = al);
953 void stop(
const char* msg,
955 int32_t code = kDefaultStopCode);
958 void svc(
uint32_t imm24, Condition cond = al);
962 void dmb(BarrierOption option);
963 void dsb(BarrierOption option);
964 void isb(BarrierOption option);
971 void cdp(Coprocessor coproc,
int opcode_1,
973 int opcode_2, Condition cond = al);
975 void cdp2(Coprocessor coproc,
int opcode_1,
979 void mcr(Coprocessor coproc,
int opcode_1,
981 int opcode_2 = 0, Condition cond = al);
983 void mcr2(Coprocessor coproc,
int opcode_1,
987 void mrc(Coprocessor coproc,
int opcode_1,
989 int opcode_2 = 0, Condition cond = al);
991 void mrc2(Coprocessor coproc,
int opcode_1,
996 LFlag l = Short, Condition cond = al);
998 LFlag l = Short, Condition cond = al);
1011 const Condition cond = al);
1014 const Condition cond = al);
1019 const Condition cond = al);
1022 const Condition cond = al);
1027 const Condition cond = al);
1030 const Condition cond = al);
1035 const Condition cond = al);
1038 const Condition cond = al);
1040 void vldm(BlockAddrMode am,
1044 Condition cond = al);
1046 void vstm(BlockAddrMode am,
1050 Condition cond = al);
1052 void vldm(BlockAddrMode am,
1056 Condition cond = al);
1058 void vstm(BlockAddrMode am,
1062 Condition cond = al);
1067 const Register extra_scratch = no_reg);
1070 const Condition cond = al);
1073 const Condition cond = al);
1077 const Condition cond = al);
1081 const Condition cond = al);
1084 const Condition cond = al);
1087 const Condition cond = al);
1090 VFPConversionMode mode = kDefaultRoundToZero,
1091 const Condition cond = al);
1094 VFPConversionMode mode = kDefaultRoundToZero,
1095 const Condition cond = al);
1098 VFPConversionMode mode = kDefaultRoundToZero,
1099 const Condition cond = al);
1102 VFPConversionMode mode = kDefaultRoundToZero,
1103 const Condition cond = al);
1106 VFPConversionMode mode = kDefaultRoundToZero,
1107 const Condition cond = al);
1110 VFPConversionMode mode = kDefaultRoundToZero,
1111 const Condition cond = al);
1114 VFPConversionMode mode = kDefaultRoundToZero,
1115 const Condition cond = al);
1118 VFPConversionMode mode = kDefaultRoundToZero,
1119 const Condition cond = al);
1122 VFPConversionMode mode = kDefaultRoundToZero,
1123 const Condition cond = al);
1126 VFPConversionMode mode = kDefaultRoundToZero,
1127 const Condition cond = al);
1130 const Condition cond = al);
1132 void vmrs(
const Register dst,
const Condition cond = al);
1133 void vmsr(
const Register dst,
const Condition cond = al);
1137 const Condition cond = al);
1139 const Condition cond = al);
1142 const Condition cond = al);
1144 const Condition cond = al);
1148 const Condition cond = al);
1154 const Condition cond = al);
1160 const Condition cond = al);
1166 const Condition cond = al);
1172 const Condition cond = al);
1178 const Condition cond = al);
1183 const Condition cond = al);
1185 const Condition cond = al);
1188 const Condition cond = al);
1190 const Condition cond = al);
1206 void vsel(
const Condition cond,
1210 void vsel(
const Condition cond,
1217 const Condition cond = al);
1219 const Condition cond = al);
1231 const Condition cond = al);
1233 const Condition cond = al);
1238 void vld1(NeonSize size,
1241 void vst1(NeonSize size,
1343 enum NopMarkerTypes {
1344 NON_MARKING_NOP = 0,
1347 PROPERTY_ACCESS_INLINED,
1348 PROPERTY_ACCESS_INLINED_CONTEXT,
1349 PROPERTY_ACCESS_INLINED_CONTEXT_DONT_DELETE,
1352 FIRST_IC_MARKER = PROPERTY_ACCESS_INLINED
1355 void nop(
int type = 0);
1357 void push(
Register src, Condition cond = al) {
1358 str(src,
MemOperand(sp, 4, NegPreIndex), cond);
1361 void pop(
Register dst, Condition cond = al) {
1362 ldr(dst,
MemOperand(sp, 4, PostIndex), cond);
1368 vstm(db_w, sp, src.low(), src.high(), cond);
1372 vstm(db_w, sp, src, src, cond);
1376 vstm(db_w, sp, src, src, cond);
1380 vldm(ia_w, sp, dst, dst, cond);
1384 void jmp(
Label* L) { b(L, al); }
1387 int SizeOfCodeGeneratedSince(
Label* label) {
1388 return pc_offset() - label->pos();
1392 int InstructionsGeneratedSince(
Label* label) {
1393 return SizeOfCodeGeneratedSince(label) / kInstrSize;
1397 static bool ImmediateFitsAddrMode1Instruction(int32_t imm32);
1400 bool ImmediateFitsAddrMode2Instruction(int32_t imm32);
1406 assem_->StartBlockConstPool();
1409 assem_->EndBlockConstPool();
1420 void RecordComment(
const char* msg);
1424 void RecordDeoptReason(DeoptimizeReason reason,
SourcePosition position,
1444 void RecordConstPool(
int size);
1450 void db(uint8_t data);
1452 void dq(uint64_t data);
1456 Instr instr_at(
int pos) {
return *
reinterpret_cast<Instr*
>(buffer_ + pos); }
1457 void instr_at_put(
int pos, Instr instr) {
1458 *
reinterpret_cast<Instr*
>(buffer_ + pos) = instr;
1460 static Instr instr_at(Address pc) {
return *
reinterpret_cast<Instr*
>(pc); }
1461 static void instr_at_put(Address pc, Instr instr) {
1462 *
reinterpret_cast<Instr*
>(pc) = instr;
1464 static Condition GetCondition(Instr instr);
1465 static bool IsLdrRegisterImmediate(Instr instr);
1466 static bool IsVldrDRegisterImmediate(Instr instr);
1467 static int GetLdrRegisterImmediateOffset(Instr instr);
1468 static int GetVldrDRegisterImmediateOffset(Instr instr);
1469 static Instr SetLdrRegisterImmediateOffset(Instr instr,
int offset);
1470 static Instr SetVldrDRegisterImmediateOffset(Instr instr,
int offset);
1471 static bool IsStrRegisterImmediate(Instr instr);
1472 static Instr SetStrRegisterImmediateOffset(Instr instr,
int offset);
1473 static bool IsAddRegisterImmediate(Instr instr);
1474 static Instr SetAddRegisterImmediateOffset(Instr instr,
int offset);
1475 static Register GetRd(Instr instr);
1476 static Register GetRn(Instr instr);
1477 static Register GetRm(Instr instr);
1478 static bool IsPush(Instr instr);
1479 static bool IsPop(Instr instr);
1480 static bool IsStrRegFpOffset(Instr instr);
1481 static bool IsLdrRegFpOffset(Instr instr);
1482 static bool IsStrRegFpNegOffset(Instr instr);
1483 static bool IsLdrRegFpNegOffset(Instr instr);
1484 static bool IsLdrPcImmediateOffset(Instr instr);
1485 static bool IsVldrDPcImmediateOffset(Instr instr);
1486 static bool IsBlxReg(Instr instr);
1487 static bool IsBlxIp(Instr instr);
1488 static bool IsTstImmediate(Instr instr);
1489 static bool IsCmpRegister(Instr instr);
1490 static bool IsCmpImmediate(Instr instr);
1491 static Register GetCmpImmediateRegister(Instr instr);
1492 static int GetCmpImmediateRawImmediate(Instr instr);
1493 static bool IsNop(Instr instr,
int type = NON_MARKING_NOP);
1494 static bool IsMovImmed(Instr instr);
1495 static bool IsOrrImmed(Instr instr);
1496 static bool IsMovT(Instr instr);
1497 static Instr GetMovTPattern();
1498 static bool IsMovW(Instr instr);
1499 static Instr GetMovWPattern();
1500 static Instr EncodeMovwImmediate(
uint32_t immediate);
1501 static Instr PatchMovwImmediate(Instr instruction,
uint32_t immediate);
1502 static int DecodeShiftImm(Instr instr);
1503 static Instr PatchShiftImm(Instr instr,
int immed);
1509 static constexpr
int kMaxDistToIntPool = 4 * KB;
1511 static constexpr
int kMinNumPendingConstants = 4;
1512 static constexpr
int kMaxNumPending32Constants =
1513 kMaxDistToIntPool / kInstrSize;
1517 void BlockConstPoolFor(
int instructions);
1520 void CheckConstPool(
bool force_emit,
bool require_jump);
1522 void MaybeCheckConstPool() {
1523 if (pc_offset() >= next_buffer_check_) {
1524 CheckConstPool(
false,
true);
1529 void Move32BitImmediate(Register rd,
const Operand& x, Condition cond = al);
1532 V8_INLINE Handle<Code> relative_code_target_object_handle_at(
1536 int buffer_space()
const {
return reloc_info_writer.pos() - pc_; }
1539 int target_at(
int pos);
1542 void target_at_put(
int pos,
int target_pos);
1547 void StartBlockConstPool() {
1548 if (const_pool_blocked_nesting_++ == 0) {
1551 next_buffer_check_ = kMaxInt;
1557 void EndBlockConstPool() {
1558 if (--const_pool_blocked_nesting_ == 0) {
1561 int start = pc_offset() + kInstrSize + 2 * kPointerSize;
1563 DCHECK(pending_32_bit_constants_.empty() ||
1564 (start < first_const_pool_32_use_ + kMaxDistToIntPool));
1571 next_buffer_check_ = no_const_pool_before_;
1575 bool is_const_pool_blocked()
const {
1576 return (const_pool_blocked_nesting_ > 0) ||
1577 (pc_offset() < no_const_pool_before_);
1580 bool VfpRegisterIsAvailable(DwVfpRegister reg) {
1581 DCHECK(reg.is_valid());
1582 return IsEnabled(VFP32DREGS) ||
1583 (reg.code() < LowDwVfpRegister::kNumRegisters);
1586 bool VfpRegisterIsAvailable(QwNeonRegister reg) {
1587 DCHECK(reg.is_valid());
1588 return IsEnabled(VFP32DREGS) ||
1589 (reg.code() < LowDwVfpRegister::kNumRegisters / 2);
1592 inline void emit(Instr x);
1599 static constexpr
int kGap = 32;
1603 static constexpr
int kMaxRelocSize = RelocInfoWriter::kMaxSize;
1604 RelocInfoWriter reloc_info_writer;
1614 std::vector<ConstantPoolEntry> pending_32_bit_constants_;
1617 RegList scratch_register_list_;
1618 VfpRegList scratch_vfp_register_list_;
1622 static const int kMaximalBufferSize = 512 * MB;
1624 int next_buffer_check_;
1640 static constexpr
int kCheckPoolIntervalInst = 32;
1641 static constexpr
int kCheckPoolInterval = kCheckPoolIntervalInst * kInstrSize;
1644 int const_pool_blocked_nesting_;
1645 int no_const_pool_before_;
1649 int first_const_pool_32_use_;
1652 int last_bound_pos_;
1654 inline void CheckBuffer();
1658 void AddrMode1(Instr instr, Register rd, Register rn,
const Operand& x);
1664 bool AddrMode1TryEncodeOperand(Instr* instr,
const Operand& x);
1666 void AddrMode2(Instr instr, Register rd,
const MemOperand& x);
1667 void AddrMode3(Instr instr, Register rd,
const MemOperand& x);
1668 void AddrMode4(Instr instr, Register rn, RegList rl);
1669 void AddrMode5(Instr instr, CRegister crd,
const MemOperand& x);
1672 void print(
const Label* L);
1673 void bind_to(Label* L,
int pos);
1674 void next(Label* L);
1677 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0);
1678 void ConstantPoolAddEntry(
int position, RelocInfo::Mode rmode,
1680 void AllocateAndInstallRequestedHeapObjects(Isolate* isolate);
1682 friend class RelocInfo;
1683 friend class BlockConstPoolScope;
1684 friend class EnsureSpace;
1685 friend class UseScratchRegisterScope;
1719 SwVfpRegister AcquireS() {
return AcquireVfp<SwVfpRegister>(); }
1723 DCHECK(assembler_->VfpRegisterIsAvailable(reg));
1728 DCHECK(assembler_->VfpRegisterIsAvailable(reg));
1733 bool CanAcquire()
const {
return *assembler_->GetScratchRegisterList() != 0; }
1734 bool CanAcquireD()
const {
return CanAcquireVfp<DwVfpRegister>(); }
1740 template <
typename T>
1741 bool CanAcquireVfp()
const;
1743 template <
typename T>
1749 VfpRegList old_available_vfp_;
1753 DEFINE_REGISTER_NAMES(
Register, GENERAL_REGISTERS);
1758 DEFINE_REGISTER_NAMES(
CRegister, C_REGISTERS);
1763 #endif // V8_ARM_ASSEMBLER_ARM_H_