V8 API Reference, 7.2.502.16 (for Deno 0.2.4)
register-configuration.h
1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 #ifndef V8_REGISTER_CONFIGURATION_H_
6 #define V8_REGISTER_CONFIGURATION_H_
7 
8 #include "src/base/macros.h"
9 #include "src/globals.h"
10 #include "src/machine-type.h"
11 #include "src/reglist.h"
12 
13 namespace v8 {
14 namespace internal {
15 
16 // An architecture independent representation of the sets of registers available
17 // for instruction creation.
18 class V8_EXPORT_PRIVATE RegisterConfiguration {
19  public:
20  enum AliasingKind {
21  // Registers alias a single register of every other size (e.g. Intel).
22  OVERLAP,
23  // Registers alias two registers of the next smaller size (e.g. ARM).
24  COMBINE
25  };
26 
27  // Architecture independent maxes.
28  static const int kMaxGeneralRegisters = 32;
29  static const int kMaxFPRegisters = 32;
30 
31  // Default RegisterConfigurations for the target architecture.
32  static const RegisterConfiguration* Default();
33 
34  // Register configuration with reserved masking register.
35  static const RegisterConfiguration* Poisoning();
36 
37  static const RegisterConfiguration* RestrictGeneralRegisters(
38  RegList registers);
39 
40  RegisterConfiguration(int num_general_registers, int num_double_registers,
41  int num_allocatable_general_registers,
42  int num_allocatable_double_registers,
43  const int* allocatable_general_codes,
44  const int* allocatable_double_codes,
45  AliasingKind fp_aliasing_kind);
46 
47  int num_general_registers() const { return num_general_registers_; }
48  int num_float_registers() const { return num_float_registers_; }
49  int num_double_registers() const { return num_double_registers_; }
50  int num_simd128_registers() const { return num_simd128_registers_; }
51  int num_allocatable_general_registers() const {
52  return num_allocatable_general_registers_;
53  }
54  int num_allocatable_float_registers() const {
55  return num_allocatable_float_registers_;
56  }
57  int num_allocatable_double_registers() const {
58  return num_allocatable_double_registers_;
59  }
60  int num_allocatable_simd128_registers() const {
61  return num_allocatable_simd128_registers_;
62  }
63  AliasingKind fp_aliasing_kind() const { return fp_aliasing_kind_; }
64  int32_t allocatable_general_codes_mask() const {
65  return allocatable_general_codes_mask_;
66  }
67  int32_t allocatable_double_codes_mask() const {
68  return allocatable_double_codes_mask_;
69  }
70  int32_t allocatable_float_codes_mask() const {
71  return allocatable_float_codes_mask_;
72  }
73  int GetAllocatableGeneralCode(int index) const {
74  DCHECK(index >= 0 && index < num_allocatable_general_registers());
75  return allocatable_general_codes_[index];
76  }
77  bool IsAllocatableGeneralCode(int index) const {
78  return ((1 << index) & allocatable_general_codes_mask_) != 0;
79  }
80  int GetAllocatableFloatCode(int index) const {
81  DCHECK(index >= 0 && index < num_allocatable_float_registers());
82  return allocatable_float_codes_[index];
83  }
84  bool IsAllocatableFloatCode(int index) const {
85  return ((1 << index) & allocatable_float_codes_mask_) != 0;
86  }
87  int GetAllocatableDoubleCode(int index) const {
88  DCHECK(index >= 0 && index < num_allocatable_double_registers());
89  return allocatable_double_codes_[index];
90  }
91  bool IsAllocatableDoubleCode(int index) const {
92  return ((1 << index) & allocatable_double_codes_mask_) != 0;
93  }
94  int GetAllocatableSimd128Code(int index) const {
95  DCHECK(index >= 0 && index < num_allocatable_simd128_registers());
96  return allocatable_simd128_codes_[index];
97  }
98  bool IsAllocatableSimd128Code(int index) const {
99  return ((1 << index) & allocatable_simd128_codes_mask_) != 0;
100  }
101 
102  const int* allocatable_general_codes() const {
103  return allocatable_general_codes_;
104  }
105  const int* allocatable_float_codes() const {
106  return allocatable_float_codes_;
107  }
108  const int* allocatable_double_codes() const {
109  return allocatable_double_codes_;
110  }
111  const int* allocatable_simd128_codes() const {
112  return allocatable_simd128_codes_;
113  }
114 
115  // Aliasing calculations for floating point registers, when fp_aliasing_kind()
116  // is COMBINE. Currently only implemented for kFloat32, kFloat64, or kSimd128
117  // reps. Returns the number of aliases, and if > 0, alias_base_index is set to
118  // the index of the first alias.
119  int GetAliases(MachineRepresentation rep, int index,
120  MachineRepresentation other_rep, int* alias_base_index) const;
121  // Returns a value indicating whether two registers alias each other, when
122  // fp_aliasing_kind() is COMBINE. Currently implemented for kFloat32,
123  // kFloat64, or kSimd128 reps.
124  bool AreAliases(MachineRepresentation rep, int index,
125  MachineRepresentation other_rep, int other_index) const;
126 
127  virtual ~RegisterConfiguration() = default;
128 
129  private:
130  const int num_general_registers_;
131  int num_float_registers_;
132  const int num_double_registers_;
133  int num_simd128_registers_;
134  int num_allocatable_general_registers_;
135  int num_allocatable_float_registers_;
136  int num_allocatable_double_registers_;
137  int num_allocatable_simd128_registers_;
138  int32_t allocatable_general_codes_mask_;
139  int32_t allocatable_float_codes_mask_;
140  int32_t allocatable_double_codes_mask_;
141  int32_t allocatable_simd128_codes_mask_;
142  const int* allocatable_general_codes_;
143  int allocatable_float_codes_[kMaxFPRegisters];
144  const int* allocatable_double_codes_;
145  int allocatable_simd128_codes_[kMaxFPRegisters];
146  AliasingKind fp_aliasing_kind_;
147 };
148 
149 } // namespace internal
150 } // namespace v8
151 
152 #endif // V8_REGISTER_CONFIGURATION_H_
v8
Definition: libplatform.h:13
uint32_t